Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-10-04
2005-10-04
Whitmore, Stacy A. (Department: 2812)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
06952815
ABSTRACT:
Some embodiments of the invention provide a method of routing several nets in a region of a design layout. Each net includes a set of pins in the region. In some embodiments, the method partitions the region into several sub-regions that have a number of edges between them. The method (1) for each particular net and each particular edge, identifies an edge-intersect probability that specifies the probability that a set of potential routes for the particular net will intersect the particular edge, and (2) uses the identified edge-intersect probabilities to identify routes for the nets. A potential route for a particular net traverses the set of sub-regions that contain the particular net's set of pins.In other embodiments, the method partitions the region into several sub-regions that have a number of paths between them. The method (1) for each particular net and each particular path, identifies a path-use probability that specifies the probability that a set of potential routes for the particular net will use the particular path, and (2) uses the identified path-use probabilities to identify routes for the nets.
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G. Over
Buset Oscar
Teig Steven
Cadence Design Systems Inc.
Stattler Johansen & Adeli LLP
Whitmore Stacy A.
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