Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-11-20
2007-11-20
Whitmore, Stacy (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
11032878
ABSTRACT:
A method of estimating routing congestion between pins in a net of an integrated circuit design, by establishing one or more potential routes between the pins which pass through buckets in the net, assigning a probabilistic usage to each bucket based on any partial blockage of the wiring tracks in each bucket, and computing routing congestion for each bucket using its probabilistic usage. When the net is a two-pin net that is a part of a larger multi-pin net, and a tree is constructed to bridge the two-pin net to another pin of the multi-pin net. The routing congestion for each bucket is computed as a ratio of the bucket usage to bucket capacity. For L-shaped routes (having at least one bend in a bucket), the probabilistic usage is proportional to a scale factor a which is a ratio of a minimum number of available wiring tracks for a given route to a sum of minimum numbers of available wiring tracks for all possible routes. For Z-shaped routes (having at least two bends in two respective buckets), the probabilistic usage is equal to a ratio of a minimum capacity of a given route to a sum of minimum capacities of all routes having an associated orientation with the given route. Assignment of the usage values may entail the creation of a temporary usage map of the net buckets with an initial value of zero usage in every temporary usage map bucket, thereafter storing usage values in corresponding buckets of the temporary usage map, and deriving a final usage map from the temporary usage map.
REFERENCES:
patent: 6952815 (2005-10-01), Teig et al.
patent: 2003/0233627 (2003-12-01), Konno et al.
J. Westra et al., “Probabilistic Congestion Prediction”, Proceedings of ISPD, pp. 204-209 (Apr. 2004).
J. Lou et al., “Estimating Routing Congestion Using Probabilistic Analysis”, IEEE Transactions on CADICS, vol. 21, No. 1, pp. 32-41 (Jan. 2002).
Alpert Charles Jay
Li Zhuo
Quay Stephen Thomas
International Business Machines - Corporation
Musgrove Jack V.
Salys Casimer K.
Whitmore Stacy
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