Priority-based code cache management

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S133000, C711S135000, C711S136000, C707S793000

Reexamination Certificate

active

07103723

ABSTRACT:
An arrangement is provided for improving the performance of a computing system, specifically for improving the efficiency of code cache management for a system running platform-independent programs with a small memory footprint. The code cache of such a system is continuously monitored during runtime. When a condition warrants performing code cache management, the priority-based code cache management is performed based on selective code garbage collection. The code garbage collection is conducted selectively for dead methods in the code cache based on probabilities of the dead methods being reused.

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patent: 2003/0009749 (2003-01-01), Subrahmanyam et al.
patent: 1 283 465 (2003-02-01), None
patent: WO 02/15003 (2002-02-01), None
Kim Hazelwood, Michael D. Smith; “Code Cache Management Schemes for Dynamic Optimizers,” Proceedings of the Sixth Annual Workshop on Interaction between Compilers and Computer Architectures (Interact '02), 2002 IEEE, pp. 1-9, USA.
PCT/US2004/002791 Int'l Search Report & Written Opinion dated Feb. 15, 2006.

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