Priority allocation in a bus interconnected discrete and/or inte

Details Priority allocation in a bus interconnected discrete and/or inte Priority allocation in a bus interconnected discrete and/or inte

1998-04-27

2000-09-12

Sheikh, Ayaz R.

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

710240, G06F 1314

Patent

active

061191884

ABSTRACT:
A method and associated arrangement for use in priority allocation in a bus interconnected digital multi-module system are disclosed. The modules are configured for requesting the use of the bus with each module being granted its request based upon its priority. During the operation of the system, a set of priorities is established such that the number of priorities is equal to the number of modules in the system. Each module is assigned to an initial priority. During the operation of the system, modules may be reassigned to a priorities which are different than their initial priorities. In addition, the priorities may be grouped in an initial group arrangement which may be reconfigured. The group arrangement may be reconfigured in any desired manner. Also, provisions are made for refusing a grant to a module even though that module possesses the highest priority among requesting modules.

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