Prioritizing caches having a common cache level

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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C714S046000

Reexamination Certificate

active

07603521

ABSTRACT:
An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches having a common cache level. The software also causes the processor to prioritize the caches having the common cache level such that the caches are displayable as having different cache levels.

REFERENCES:
patent: 5784548 (1998-07-01), Liong et al.
patent: 6122712 (2000-09-01), Torii
patent: 6202127 (2001-03-01), Dean et al.
patent: 2002/0143780 (2002-10-01), Gorman
patent: 2003/0085924 (2003-05-01), Pankovcin
patent: 2004/0268045 (2004-12-01), Gray
patent: 2005/0102572 (2005-05-01), Oberlaender

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