Printer circuit and a process for preparing same

Details Printer circuit and a process for preparing same Printer circuit and a process for preparing same

1987-07-09

1990-12-25

Robinson, Ellis P.

Radiation imagery chemistry: process, composition, or product th

Imaging affecting physical property of radiation sensitive...

Making electrical device

430313, 430394, G03C 500

Patent

active

049802704

ABSTRACT:
A printed circuit comprising a substrate, a first conductive circuit pattern thereon and an insulator on the first conductive circuit pattern. The insulator has a via hole which extends down to and is tapered toward the first conductive circuit pattern. A second conductive circuit pattern is formed on the side wall of the via hole and on a portion of the first conductive circuit pattern. The tapered via hole allows the second conductive circuit pattern to ensure excellent electrical contact with the first conductive circuit pattern.

REFERENCES:
patent: 3634602 (1972-01-01), von Brock
patent: 4127436 (1978-11-01), Friel
patent: 4245273 (1981-01-01), Feinberg et al.
patent: 4347306 (1982-08-01), Takeda et al.
patent: 4378383 (1983-03-01), Moritz
patent: 4434224 (1984-02-01), Yoshikawa et al.
patent: 4451326 (1984-05-01), Gwozdz
patent: 4487652 (1984-12-01), Almgren
patent: 4495220 (1985-01-01), Wolf et al.
patent: 4504540 (1985-03-01), Kaminaka et al.
patent: 4521476 (1985-06-01), Asai et al.
patent: 4523976 (1985-06-01), Bukhman
patent: 4525383 (1985-06-01), Saito
patent: 4560436 (1985-12-01), Bukhman et al.
patent: 4572764 (1986-02-01), Fan
patent: 4578304 (1986-03-01), Hamaguchi
patent: 4591547 (1986-05-01), Brownell
patent: 4619887 (1986-10-01), Hooper et al.
patent: 4630355 (1986-12-01), Johnson
patent: 4645562 (1987-02-01), Liao et al.
patent: 4672152 (1987-06-01), Shinohara et al.
patent: 4681795 (1987-07-01), Tuckerman
J. P. Kent, Doublecoat Planar Polyimide Process, IBM Technical Disclosure Bulletin, vol. 27, No. 2, Jul. 1984, pp. 1149 and 1150.
Multilayer Interconnections Using Polyimide Dielectrics and Aluminum Conductors, Hedeki Tsunetsugu et al., IMC 1984 Proceedings, Tokyo, May 21-23, 1984, pp. 235-239.

Affiliated with

Also associated with

Rating

Printer circuit and a process for preparing same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Printer circuit and a process for preparing same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Printer circuit and a process for preparing same will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1162220