Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2008-11-03
2011-11-22
Norris, Jeremy (Department: 2835)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C257S782000, C361S783000, C029S832000
Reexamination Certificate
active
08063313
ABSTRACT:
A printed circuit board (PCB) and a semiconductor package that are configured to prevent delamination and voids. In one example embodiment, the semiconductor package includes a PCB having a base substrate on which conductive patterns are formed and which includes an interior region having a die paddle for receiving a semiconductor chip and an exterior region disposed outside the interior region. The PCB also includes a first solder resist formed on a portion of the base substrate corresponding to the interior region and a second solder resist formed on a portion of the base substrate corresponding to the exterior region. The second solder resist may also have a greater surface roughness than the surface roughness of the first solder resist.
REFERENCES:
patent: 2008/0136033 (2008-06-01), Nagamatsu et al.
patent: 01-165495 (1989-06-01), None
patent: 09-055579 (1997-02-01), None
patent: 11-260954 (1999-09-01), None
patent: 1998-020727 (1998-06-01), None
English language abstract of Korean Publication No. 1998-020727.
English language abstract of Japanese Publication No. 01-165495.
English language abstract of Japanese Publication No. 09-055579.
English language abstract of Japanese Publication No. 11-260954.
Han Chang-Hoon
Kim Hyoung-suk
Lee Kwang-Ryul
Oh Yun-Jin
Muir Patent Consulting, PLLC
Norris Jeremy
Samsung Electronics Co,. Ltd.
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