Dynamic magnetic information storage or retrieval – General processing of a digital signal – Data clocking
Reexamination Certificate
1996-04-25
2002-04-30
Neal, Regina Y. (Department: 2651)
Dynamic magnetic information storage or retrieval
General processing of a digital signal
Data clocking
C360S031000
Reexamination Certificate
active
06381084
ABSTRACT:
CLAIM OF PRIORITY
This application makes reference to, incorporates the same herein, and claims all benefits accruing under 35 U.S.C. § 119 arising from an application for Method For Preventing Overrun In A Disk Controller earlier filed in the Korean Industrial Property Office on Apr. 25, 1995 and there duly assigned Serial No. 9792/1995.
BACKGROUND OF THE INVENTION
The present invention relates to a disk controller, and more particularly, to a method for preventing an overrun condition of a sequencer in a disk controller.
When performing a read or write operation in a disk drive device, a disk controller determines the position of a transducing head along a disk surface by detecting predetermined information on the disk surface. When this information is not detected, perhaps due to a disk defect, an overrun condition can occur, thereby creating an obstacle to normal operation. Accordingly, there exists a need to prevent overrun conditions in a disk drive device.
One prior art reference directed towards solving this problem is U.S. Pat. No. 5,371,724 entitled Data Transducer positioning System With An Overrun Prevention Capability issued to Uno. In Uno '724, a track seeking operation is stopped when a predetermined number of errors are detected. An error is determined to have occurred when actual track data differs by a predetermined degree from an expected track on which the transducer is supposed to be positioned at that moment. While conventional art such as Uno '724 possesses merit in its own right, I believe that an improved method for preventing overruns in a disk controller can be contemplated.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an improved method for preventing an overrun condition in a disk controller.
It is another object to provide a method for effectively preventing an overrun condition of a sequencer in a disk controller by using timer interrupts from a microprocessor.
To achieve these and other objects, the present invention provides a sequencer overrun prevention method contemplates initializing a sequencer; reading a timer value indicating when the sequencer begins operation; calculating a sequencer halting point by adding a predetermined time constant to the timer value; determining whether the sequencer operates at the sequencer halting point; and forcibly halting the sequencer when the sequencer operates at the sequencer halting point. The predetermined time constant is represented by T in the expression: T=(N)×(time required for one disk revolution)×(timer frequency), where N is indicative of a maximum number of detected indices and is greater than or equal to two.
There is also provided a sequencer overrun prevention method, following one or more steps of calculating a sequencer halting point by adding a predetermined time constant to a timer value indicating when a sequencer begins operation; reading a current timer value during the operation of the sequencer; incrementing the current timer value by a predetermined value to generate an incremented timer value; determining whether the sequencer halting point is equal to the incremented timer value; and setting a flag representative of an index detection error, and forcibly halting the sequencer when the sequencer halting point is equal to the incremented timer value. The predetermined time constant is represented by T the in expression: T=(N)×(time required for one disk revolution)×(timer frequency), where N is indicative of a maximum number of detected indices and is greater than or equal to two. Other steps are provided for determining whether the flag representative of the index detection error is set; performing an index detection error correction routine when the flag is set; and performing a normal error detection and correction routine when the flag is cleared.
REFERENCES:
patent: 4920462 (1990-04-01), Couse et al.
patent: 5060093 (1991-10-01), Kawahara
patent: 5371724 (1994-12-01), Uno
patent: 5517631 (1996-05-01), Machado et al.
Bushnell , Esq. Robert E.
Neal Regina Y.
Samsung Electronics Co,. Ltd.
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