Preventing floppy disk data corruption

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Reexamination Certificate

active

06889342

ABSTRACT:
DMA requests from at least one DMA channel with a higher priority than the floppy-disk controller are disabled for at least a portion of a write to floppy DMA operation that includes the transfer of the last byte. This helps ensure that DMA requests generated by the floppy-disk controller will be responded to in under 14 μS preventing an undetected underrun condition on systems with flawed floppy disk controllers from occurring. An estimate of when the last byte of a write to floppy DMA operation is going to be transferred is made. This estimate may be based upon a fixed interval from the start of the write operation. This estimate may also be based upon readings taken from the byte counter and of the DMA controller and the system timer.

REFERENCES:
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patent: 5423029 (1995-06-01), Schieve
patent: 5790869 (1998-08-01), Melo et al.
patent: 5983002 (1999-11-01), Adams
patent: 6401222 (2002-06-01), Adams
patent: 20020046367 (2002-04-01), Yang
Intel letter to customers dated May 2, 1988; 6 pages.
“IBM—NEC Meeting for uPD765A/uPD72065 Problem”; May 1987, NEC Electronics Inc.; Microcomputer Products Division, NEC Corporation; 9 pages.
“Hardware-Induced Data Virus (Floppy Diskett Controller Desgin Flaw) TR-881101-1”; Nov. 14, 1998; P.M. Adams, D.Sc., Ph.D.; Nova University, Dept of Computer Science, 3301 College Avenue, Ft. Lauderdale, FL 33314; 31 pages.

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