Preventing access to secure area of a cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C711S163000

Reexamination Certificate

active

06397301

ABSTRACT:

FIELD OF THE INVENTION
Embodiments of the present invention provide an apparatus and method for securing information in a cache. More particularly, embodiments of the present invention provide an apparatus and method for securing information in a processor cache from unauthorized accesses. once the information has been loaded into the cache.
BACKGROUND OF THE INVENTION
It is sometimes necessary to prevent unauthorized users from determining the contents of information stored in a computer system. For example, a computer may contain proprietary data or software. It is desirable to prevent a user from making unauthorized copies or determining the contents of such information. This concern is especially relevant where the user has physical control of the computer and/or is able to determine the program being executed by the processor.
Information in the memory of a computer system may be protected by using techniques such as encrypting the information. There are many familiar encryption algorithms. It is not practical, however, to use encryption to protect information that is stored in a cache memory. The advantage of a cache memory is that the information can be more quickly retrieved and used by the processor. Because the encrypted information would have to be un-encrypted before it is used by the processor, encrypting the information in the cache would slow down the processor and undermine the fast access benefits of the cache.
If left unencrypted, the contents of information stored in a cache may be determined by an unauthorized user. For example, a user may instruct the processor to read the information in question from the cache memory and write the information to an input/output device or other location where the user can determine the contents of the information. An unauthorized user might directly send a read command to the processor that is associated with the cache or another processor in the system may access the cache via a “snoop” operation. A “snoop” operation can occur when a processor fails to find a line in its own cache and sends the inquiry on the system bus to the main memory. In response to this inquiry, other processors must look in their own cache and, if the line is found in the other processor's cache, the line must be returned from that cache rather than from memory. In this case,the processor is said to have performed a “snoop” operation.
In addition, an unauthorized user could determine the contents of the information by doing a test port read or by executing the program in single-step mode and recording the contents of the program registers. Further, if the information in question was evicted from the cache, and thus copied back into the main memory, a user could determine the contents of the unencrypted information by using, for example, an oscilloscope. Finally, if the integrated circuit chip on which the cache resides has scan chain access, the unauthorized user could learn the contents of the protected information by reading the scan chain.
Based on the foregoing, there is a need for a method that secures the information in the cache so that unauthorized users will not be able to determine the contents of the information.
SUMMARY OF THE INVENTION
Embodiments of the present invention provide a method and apparatus for securing information in a cache that is coupled to a processor. The information is secured by recording the location in the cache of information that is being secured, and performing a cache avoidance procedure instead of allowing the instruction to access the area of the cache containing the information being secured.


REFERENCES:
patent: 4357656 (1982-11-01), Saltz et al.
patent: 4740889 (1988-04-01), Motersole et al.
patent: 5210850 (1993-05-01), Kelly et al.
patent: 5224166 (1993-06-01), Hartman, Jr.
patent: 5247639 (1993-09-01), Yamahata
patent: 5408636 (1995-04-01), Santeler
patent: 5551004 (1996-08-01), McClure
patent: 5586293 (1996-12-01), Baron et al.
patent: 5724550 (1998-03-01), Stevens
patent: 5761719 (1998-06-01), Mahin et al.
patent: 5900014 (1999-05-01), Bennett
patent: 6044478 (2000-03-01), Green
patent: 6131155 (2000-10-01), Alexander et al.
patent: 6138216 (2000-10-01), Harvey

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Preventing access to secure area of a cache does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Preventing access to secure area of a cache, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Preventing access to secure area of a cache will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2899612

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.