Preserving clearance between encapsulant and PCB for cavity-down

Details Preserving clearance between encapsulant and PCB for cavity-down Preserving clearance between encapsulant and PCB for cavity-down

1997-05-22

1998-11-10

Ostrowski, David

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Insulating material

257707, 257738, 257778, 257780, 361709, 361719, H01L 2312, H01L 2310

Patent

active

058348395

ABSTRACT:
A semiconductor package for preserving clearance between encapsulant and a printed circuit board is provided including a package substrate having an upper surface and a lower surface, wherein the upper surface is attached to a heat spreader and the lower surface is electrically coupled to a printed circuit board by a plurality of high temperature solder balls, the solder balls being formed from a metal such as lead, tin or copper; a semiconductor die, the non-active side of which is coupled to the heat spreader, and which is electrically coupled to the substrate by bond wires joining bond pads on the active side of the semiconductor die to electrical traces formed on the package substrate; an encapsulant covering the semiconductor die and the bond wires such that the encapsulant forms a protrusion from the lower surface of the package substrate; and a lid having a plurality of stand-off legs, each leg being formed at a corner of the lid, disposed over the encapsulant which establishes the height of the protrusion from the lower surface of the package substrate toward the top surface of the printed circuit board.

REFERENCES:
patent: 5045921 (1991-09-01), Lin et al.
patent: 5102829 (1992-04-01), Cohn
patent: 5455456 (1995-10-01), Newman
patent: 5572405 (1996-11-01), Wilson et al.
patent: 5583378 (1996-12-01), Marrs et al.
patent: 5616958 (1997-04-01), Laine et al.
patent: 5629835 (1997-05-01), Mahulikar et al.

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