Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-04-05
2011-04-05
Doan, Duc T (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
Reexamination Certificate
active
07921260
ABSTRACT:
A computer-implemented method of cache replacement includes steps of: determining whether each cache block in a cache memory is a read or a write block; augmenting metadata associated with each cache block with an indicator of the type of access; receiving an access request resulting in a cache miss, the cache miss indicating that a cache block will need to be replaced; examining the indicator in the metadata of each cache block for determining a probability that said cache block will be replaced; and selecting for replacement the cache block with the highest probability of replacement.
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Wang, Y, et al., “T1: An Efficient Cache Replacement with Distinguishing Write Blocks From Read Blocks in Disk Arrays,” Parallel and Distributed Processing and Applications, IPSA 2005 International Workshops, Nanjing, China, Nov. 2-5, 2005, Proceedings.
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Cain, III Harold W.
Choi Jong-Deok
Serrano Mauricio J.
Buchenhorner Michael J.
Doan Duc T
International Business Machines - Corporation
Jennings Derek S.
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