Preferred write-mostly data cache replacement policies

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Reexamination Certificate

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07921260

ABSTRACT:
A computer-implemented method of cache replacement includes steps of: determining whether each cache block in a cache memory is a read or a write block; augmenting metadata associated with each cache block with an indicator of the type of access; receiving an access request resulting in a cache miss, the cache miss indicating that a cache block will need to be replaced; examining the indicator in the metadata of each cache block for determining a probability that said cache block will be replaced; and selecting for replacement the cache block with the highest probability of replacement.

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patent: 2006/0179231 (2006-08-01), Briggs
Wang, Y, et al., “T1: An Efficient Cache Replacement with Distinguishing Write Blocks From Read Blocks in Disk Arrays,” Parallel and Distributed Processing and Applications, IPSA 2005 International Workshops, Nanjing, China, Nov. 2-5, 2005, Proceedings.
Wang Yulin, et al., “T1: A Write-prior Partitioning LRU Algorithm for the Multi-port Cache in Disk Arrays,” International Conference on Computer and Information Technology, 5th, Shanghai, Sep. 21-23, 2005 [CIT 2005 Proceedings], pp. 322-326.

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