Predicated execution using operand predicates

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition

Reexamination Certificate

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C717S152000

Reexamination Certificate

active

10283709

ABSTRACT:
Full predication of instruction execution is provided by operand predicates, where each operand has an associated predicate bit intuitively indicating the validity of the operand value. In a programmable processor supporting operand predication, an instruction will execute only if the predicate bit of every register containing a source or destination operand is true, where the predicate bit of the destination register is set to the logical AND of the source registers' predicatest for most instructions. Similarly, in a non-programmable processor synthesized with predicated operand support, an operator will perform the associated function depending on the state of inputs' predicates and the output predicate, which is normally evaluated as the logical AND of the inputs' predicates. An additional bit for each data register, a change in the semantics of the instructions to include predication, and a few additional instructions to save and restore register predicate bits and to specifically set or reset a register's predicate bit are required.

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patent: 2002/0112148 (2002-08-01), Wang et al.
Wang et al., REgister Renaming and Scheduling for Dynamic Execution of Predicated Code, IEEE 2001. pp. 1-11.
Sima, et al., Advanced Computer Architectures, A Design Space Approach, Addison-Wesley, 1997, pp. 237-245.

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