Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-10-04
2005-10-04
Anderson, Matthew D. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S156000, C712S213000, C712S229000
Reexamination Certificate
active
06952754
ABSTRACT:
An apparatus and a system may include a modal property indicator and an access module to receive the modal property indicator and to access a selected location based on a condition of the modal property indicator. An article may include data, which, when accessed, results in a machine performing a method including indicating a processor mode to a memory including a plurality of instructions and predecoding an instruction selected from the plurality of instructions according to the processor mode.
REFERENCES:
patent: 3736566 (1973-05-01), Anderson et al.
patent: 5335331 (1994-08-01), Murao et al.
patent: 5809273 (1998-09-01), Favor et al.
patent: 5826053 (1998-10-01), Witt
patent: 5970235 (1999-10-01), Witt et al.
patent: 6085314 (2000-07-01), Asghar et al.
patent: 6539470 (2003-03-01), Mahurin et al.
patent: 6598154 (2003-07-01), Vaid et al.
patent: 2002/0004897 (2002-01-01), Kao
O'Connor Dennis M.
Strazdus Stephen J.
Anderson Matthew D.
Schwegman Lundberg Woessner & Kluth P.A.
LandOfFree
Predecode apparatus, systems, and methods does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Predecode apparatus, systems, and methods, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Predecode apparatus, systems, and methods will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3468467