Precise exit logic for removal of security overlay of...

Details Precise exit logic for removal of security overlay of... Precise exit logic for removal of security overlay of...

2007-08-07

2007-08-07

Moise, Emmanuel L. (Department: 2137)

Electrical computers and digital processing systems: support

Multiple computer communication using cryptography

Protection at a particular protocol layer

C380S210000, C380S211000, C726S022000, C726S026000

Reexamination Certificate

active

10326440

ABSTRACT:
A circuit generally comprising a first memory, a processor and a logic block is disclosed. The first memory may store (i) a write instruction to store a non-highest security value of at least three security values in a register and (ii) a jump instruction to a second memory. The processor may have a pipeline and may be configured to (i) bootstrap to the first memory while the register stores a highest security value of the security values and (ii) execute the jump instruction following the write instruction. The logic block may be configured to (i) detect the write instruction in an execution stage of the pipeline and (ii) store the non-highest security value in the register in response to detecting the write instruction in a write back stage of the pipeline.

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