Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2003-02-04
2004-06-29
Tran, Andrew Q. (Department: 2824)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S084000, C345S087000, C345S090000, C345S080000, C345S099000, C345S100000
Reexamination Certificate
active
06756957
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal device (LCD) source driver, and more particularly, to a precharge voltage generating method and precharge voltage generating circuit for making slew rates of output signals constant by precharging a signal line to the level of a next output signal regardless of the level of the next output signal.
2. Description of the Related Art
FIG. 1
is a diagram of a prior art LCD apparatus. Referring to
FIG. 1
, the prior art LCD apparatus
1
comprises a plurality of upper part source drivers
11
through
15
, a plurality of lower part source drivers
23
through
27
, a thin film transistor (TFT)-LCD panel
21
and a plurality of gate drivers
17
through
19
.
As well known in the field of the present invention, a gate driver
17
drives the gate electrode of a TFT, and a source driver
11
provides a predetermined signal voltage to the source of the TFT through a signal line
29
. For arranging source drivers, there are a single bank array and a dual bank array.
In the single bank array, a plurality of upper part source drivers
11
through
15
are arranged on the upper part of the TFT-LCD panel
21
, or a plurality of lower part source drivers
23
through
27
are arranged on the lower part of the TFT-LCD panel
21
such that the signal line
29
is driven.
In the dual bank array, a plurality of upper part source drivers
11
through
15
are arranged on the upper part of the TFT-LCD panel
21
and a plurality of lower part source drivers
23
through
27
are arranged on the lower part of the TFT-LCD panel
21
such that the signal line
29
is driven.
When a high resolution, large-sized LCD panel is used, the dual bank array is used because of a short slew rate and a large load of the signal line
29
.
However, the dual bank array needs double the printed circuit board (hereinafter, referred to as a “PCB”) of the single bank array. Accordingly, in the dual bank array, the chip size and the number of elements increase.
SUMMARY OF THE INVENTION
To solve the above problems, it is an object of the present invention to provide a precharge voltage generating method and a precharge voltage generating circuit for making the slew rates of output signals constant by precharging a signal line connected to an auxiliary source driver to the level of a next output signal regardless of the level of the next output signal.
According to an aspect of the present invention, there is provided a signal line precharge method for precharging a signal line connected to an auxiliary source driver to a predetermined voltage level in a precharge mode, the method comprising: in response to the combination of a polarity inversion signal of input data and the most significant bit of the input data, outputting one voltage level selected among precharge voltages having different voltage levels; and in response to a precharge timing control signal, precharging the signal line to the selected voltage level.
In the signal line precharge method according to the present invention, it is preferable that the activation time of the precharge timing control signal be controlled and that the signal line be connected to the source of a thin film transistor (TFT).
Another signal line precharge method according to the present invention comprises: storing a first polarity inversion signal of first data; comparing the first polarity inversion signal with a second polarity inversion signal of second data being input following the first data; if the comparison result indicates that the phase of the first polarity inversion signal is different from the phase of the second polarity inversion signal, in response to the combination of the second polarity inversion signal and the most significant bit of the second data, outputting one voltage level selected among precharge voltages having different voltage levels; and in response to a precharge timing control signal, precharging a signal line connected to an auxiliary source driver to the selected voltage level.
Alternatively, the present invention provides a signal line precharge method comprising: storing a first polarity inversion signal of first data and the most significant bit of the first data; comparing the first polarity inversion signal with a second polarity inversion signal of second data being input following the first data, and comparing the most significant bit of the first data with the most significant bit of the second data; if the comparison result indicates that the polarity of the first polarity inversion signal is the same as the phase of the second polarity inversion signal and the most significant bit of the first data is different from the most significant bit of the second data, in response to the combination of the second polarity inversion signal and the most significant bit of the second data, outputting one voltage level selected among precharge voltages having different voltage levels; and in response to a precharge timing control signal, precharging a signal line connected to an auxiliary source driver to the selected voltage level.
In the alternative embodiments of the signal line precharge method according to the present invention, it is preferable that the activation time of the precharge timing control signal be controlled and that the signal line be connected to the source of a thin film transistor (TFT).
Another signal line precharge method according to the present invention for precharging each signal line connected to an auxiliary source driver IC corresponding to the signal line among a plurality of auxiliary source driver ICs, to a predetermined voltage level in a precharge mode, the method comprising: in response to the combination of a polarity inversion signal of input data and the most significant bit of the input data, outputting one voltage level selected among precharge voltages having different voltage levels; and in response to a precharge timing control signal, precharging the signal line to the selected voltage level.
Alternatively, the present invention provides a signal line precharge method for precharging each signal line, which is connected to an auxiliary source driver IC corresponding to the signal line among a plurality of auxiliary source driver ICs and sends a signal, to a predetermined voltage level in a precharge mode, the method comprising: storing a first polarity inversion signal of first data; comparing the first polarity inversion signal with a second polarity inversion signal of second data being input following the first data; if the comparison result indicates that the level of the first polarity inversion signal is different from the level of the second polarity inversion signal, in response to the combination of the second polarity inversion signal and the most significant bit of the second data, outputting one voltage level selected among precharge voltages having different voltage levels; and in response to a precharge timing control signal, precharging a signal line connected to an auxiliary source driver to the selected voltage level.
According to another aspect of the present invention, there is provided a precharge voltage generating circuit for precharging a signal line connected to an auxiliary source driver to a predetermined voltage level in a precharge mode, the precharge voltage generating circuit comprising: a precharge voltage selection circuit which in response to the combination of a polarity inversion signal of input data and the most significant bit of the input data, outputs one voltage level selected among precharge voltages having different voltage levels; and an output circuit which in response to a precharge timing control signal, outputs the selected voltage level to the signal line.
It is preferable that the precharge timing control signal is activated in response to a clock signal and inactivated in response to an input signal which is input from the outside of the precharge voltage generating circuit, and the activation time of the precharge timing control signal is controlle
Mills & Onello LLP
Samsung Electronics Co,. Ltd.
Tran Andrew Q.
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