Pre-sense amplifier with reduced output swing

Details Pre-sense amplifier with reduced output swing Pre-sense amplifier with reduced output swing

1998-12-28

2000-05-16

Elms, Richard

Static information storage and retrieval

Read/write circuit

Differential sensing

365205, 365208, 327 54, G11C 702

Patent

active

060646136

ABSTRACT:
A fast CMOS sense amplifier for semiconductor memories is disclosed. The memory sense amplifier configuration is comprised of differential pre-sense amplifier stage and a sense amplifier second stage. The pre-sense amplifier stage is composed of two sections with feedback between the sections which reduces the output swing by means of a clamping action, therefore improving output switching recovery time in response to differential input. The feedback between the sections is provided by cross connecting the sub outputs of each section to the gate of a clamping transistor at each section. The reduced recovery time produces reduced delay at the output which speeds up the operation of the sense amplifier. Additionally, the clamping devices have the effect of reducing the average DC current in the pre-sense amplifier.

REFERENCES:
patent: 4845672 (1989-07-01), Watanabe et al.
patent: 5412607 (1995-05-01), Kusaba
patent: 5546026 (1996-08-01), Lin et al.
patent: 5654928 (1997-08-01), Lee et al.
patent: 5663915 (1997-09-01), Mobley
patent: 5850359 (1998-12-01), Liu
patent: 5894233 (1999-04-01), Yoon
Sasaki et al., "A 7-ns 140-mW 1-Mb CMOS SRAM with Current Sense Amplifier", IEEE Journal of Solid-state Circuits, vol. 27, No. 11, Nov. 1992, pp 1511-1517.

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