Electrical computers and digital processing systems: processing – Processing control – Context preserving (e.g. – context swapping – checkpointing,...
Reexamination Certificate
2011-01-18
2011-01-18
Kim, Kenneth S (Department: 2111)
Electrical computers and digital processing systems: processing
Processing control
Context preserving (e.g., context swapping, checkpointing,...
C718S108000
Reexamination Certificate
active
07873816
ABSTRACT:
A circuit arrangement and method utilize thread pair context caching, where a pair of hardware threads in a multithreaded processor, which are each capable of executing a process, are effectively paired together, at least temporarily, to perform context switching operations such as context save and/or load operations in advance of context switches performed in one or more of such paired hardware threads. By doing so, the overall latency of a context switch, where both the context for a process being switched from must be saved, and the context for the process being switched to must be loaded, may be reduced.
REFERENCES:
patent: 4860192 (1989-08-01), Sachs et al.
patent: 5872985 (1999-02-01), Kimura
patent: 5893159 (1999-04-01), Schneider
patent: 5907702 (1999-05-01), Flynn et al.
patent: 5958045 (1999-09-01), Pickett
patent: 6014728 (2000-01-01), Baror
patent: 6073215 (2000-06-01), Snyder
patent: 6128728 (2000-10-01), Dowling
patent: 6202130 (2001-03-01), Scales, III et al.
patent: 6223208 (2001-04-01), Kiefer et al.
patent: 6253306 (2001-06-01), Ben-Meir et al.
patent: 6292888 (2001-09-01), Nemirovsky et al.
patent: 6311260 (2001-10-01), Stone et al.
patent: 6535962 (2003-03-01), Mayfield et al.
patent: 6574712 (2003-06-01), Kahle et al.
patent: 6697935 (2004-02-01), Borkenhagen et al.
patent: 6845501 (2005-01-01), Thompson et al.
patent: 6976147 (2005-12-01), Isaac et al.
patent: 7260704 (2007-08-01), Cooksey et al.
patent: 2003/0023663 (2003-01-01), Thompson et al.
patent: 2004/0163083 (2004-08-01), Wang et al.
patent: 2005/0149697 (2005-07-01), Enright et al.
patent: 2006/0294347 (2006-12-01), Zou et al.
patent: 2008/0104610 (2008-05-01), Norton et al.
patent: 1276888 (2000-12-01), None
patent: 1300006 (2001-06-01), None
U.S. Appl. No. 09/458,883, filed Dec. 10, 1999, by Puzak et al.
Hickey Mark J
Schwinn Stephen J
Tubbs Matthew R
Wait Charles D
International Business Machines - Corporation
Kim Kenneth S
Wood Herron & Evans LLP
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