Electrical computers and digital processing systems: processing – Processing control
Reexamination Certificate
2007-04-02
2009-12-29
Coleman, Eric (Department: 2183)
Electrical computers and digital processing systems: processing
Processing control
C712S213000
Reexamination Certificate
active
07640420
ABSTRACT:
Apparatus and computing systems associated with data pre-fetching are described. One embodiment includes a processor that includes a first unit to store data corresponding to a load instruction and an instruction pointer (IP) value associated with the load instruction. The processor also includes a second unit to produce a predicted demand address for a next load instruction, the predicted demand address being based on a constant stride value. The processor also includes a third unit to generate an instruction pointer pre-fetch (IPP) request for the predicted demand address. The processor may also include units to arbitrate between generated IP pre-fetch requests and alternative pre-fetch requests.
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patent: 2005/0289301 (2005-12-01), Woo et al.
Vanderweil,S.P. etal., Data Prefetch Mechanisms, 2000, ACM Computing Surveys, vol. 32,No. 2, pp. 174-199.
Wenxin Zu, X. F. etal., New prefetch technique design for L2 Cache, 2006, IEEE, 4 pages.
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Doweck Jack
Sherman Marina
Coleman Eric
Intel Corporation
Murthy S.K.
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