Pre-charge for the bit lines of a random access memory

Details Pre-charge for the bit lines of a random access memory Pre-charge for the bit lines of a random access memory

1983-07-22

1984-05-08

Stellar, George G.

Static information storage and retrieval

Systems using particular element

Flip-flop

365189, 365203, G11C 700, G11C 1134

Patent

active

044478925

ABSTRACT:
A random access memory comprises an array of a plurality of storing locations, address signal lines for addressing the plurality of storing locations, a data signal line commonly coupled to said plurality of storing locations for inputting or outputting data signals, each said location comprising an output inverter circuit having the output connected to the data signal line, a first switching element, coupled to the output inverter circuit, which is placed in nonconductive states in a writing operation mode of the random access memory, and a second switching means connected to the data signal line for receiving pre-charge signals in synchronization with access signals held on the address signal line so that the data signal line is precharged prior to a reading operation mode of the random access memory.

REFERENCES:
patent: 4112506 (1978-09-01), Zibu
patent: 4131951 (1978-12-01), Asahi
patent: 4150441 (1979-04-01), Ando
patent: 4281400 (1981-07-01), Schanzer et al.
U.S. P.T.O. Classification Definitions Class 365 Jan. 78 p. 365-21 Subclass 203.

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