Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate
2007-10-16
2007-10-16
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Interface
Logic level shifting
C326S080000, C326S081000, C326S083000, C326S086000
Reexamination Certificate
active
11223742
ABSTRACT:
A pre-buffer level shifter and an I/O buffer apparatus are provided. The pre-buffer level shifter includes a switchable current source, a current mirror, a buffer unit, a first clamping circuit and a second clamping circuit. Because of a clamping circuit inside a thin oxide MOS transistor device of the pre-buffer level shifter, the present invention can control the voltage swing of the signal for driving an output buffer within a suitable voltage range. Thus, the pre-buffer level shifter can correctly drive the output buffer made of thin oxide MOS transistor devices, increase the operating speed and ensure the reliability thereof.
REFERENCES:
patent: 5821809 (1998-10-01), Boerstler et al.
patent: 6104216 (2000-08-01), Satoh
patent: 6326811 (2001-12-01), Coddington et al.
patent: 6624660 (2003-09-01), Li et al.
patent: 2007/0008001 (2007-01-01), Sanchez et al.
Chuang Chien-Hui
Wey Meng-Jer
Wu Chih-Hung
Barnie Rexford
Faraday Technology Corp.
Hsu Winston
Tran Thienvu
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