Powergate control using boosted and negative voltages

Details Powergate control using boosted and negative voltages Powergate control using boosted and negative voltages

2006-05-30

2006-05-30

Cunningham, Terry D. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Utilizing three or more electrode solid-state device

C327S530000, C327S544000

Reexamination Certificate

active

07053692

ABSTRACT:
A powergating circuit includes an MOS circuit such as a memory circuit having a first power terminal and a second power terminal, a P-channel transistor having a drain coupled to the first power terminal of the MOS circuit, and an N-channel transistor having a drain coupled to the second power terminal of the MOS circuit. In order to minimize leakage current and resultant power dissipation a negative VGSvoltage is established in the transistors during a standby mode and a boosted VGSvoltage is established in the transistors during an active mode.

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