Electronic digital logic circuitry – Tri-state – With field-effect transistor
Reexamination Certificate
2005-11-01
2005-11-01
Cho, James H. (Department: 2819)
Electronic digital logic circuitry
Tri-state
With field-effect transistor
C326S083000
Reexamination Certificate
active
06960937
ABSTRACT:
Area-efficient power-up and enable control circuits useful in PLD interconnection arrays. A control circuit can include a driver circuit, first and second pull-ups, and first and second pull-downs. The driver circuit has an output terminal coupled to a control circuit output terminal. The first and second pull-ups are coupled in series between the control circuit output terminal and power high. The first pull-up has a gate terminal coupled to an enable terminal. The second pull-up has a gate terminal coupled to a pull-up control terminal. The first and second pull-downs are coupled in parallel between the control circuit output terminal and ground. The first pull-down has a gate terminal coupled to the enable terminal. The second pull-down has a gate terminal coupled to a pull-down control terminal. In other embodiments, the first and second pull-ups are coupled in parallel, and the first and second pull-downs are coupled in series.
REFERENCES:
patent: 5682110 (1997-10-01), Rountree
patent: 5929654 (1999-07-01), Park et al.
patent: 6163169 (2000-12-01), Lawson
patent: 6496045 (2002-12-01), Nguyen
Cartier Lois D.
Cho James H.
Xilinx , Inc.
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