Power throttling method and apparatus

Details Power throttling method and apparatus Power throttling method and apparatus

2003-08-21

2009-02-24

Butler, Dennis M (Department: 2115)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S320000, C713S322000, C713S323000

Reexamination Certificate

active

07496776

ABSTRACT:
Disclosed is an apparatus which deactivates both the AC as well as the DC component of power for various functions in a CPU. The CPU partitions dataflow registers and arithmetic units such that voltage can be removed from the upper portion of dataflow registers when the software is not utilizing same. Clock signals are also prevented from being applied to these non-utilized components. As an example, if a 64 bit CPU (processor unit) is to be used with both 32 and 64 bit software, the mentioned components may be partitioned in equal sized upper and lower portions. The logic signal for activating the removal of voltage may be obtained from a software-accessible architected control register designated as a machine state register in some CPUs. The same logic may be used in connection with removing voltage and clocks from other specialized functional components such as the floating point unit when software instructions do not presently require same.

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patent: 6625797 (2003-09-01), Edwards et al.
patent: 2002/0174319 (2002-11-01), Rivers et al.
patent: 2003/0065960 (2003-04-01), Rusu et al.
patent: 2003/0135779 (2003-07-01), Takashima et al.

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