Electronic digital logic circuitry – Interface – Logic level shifting
Reexamination Certificate
2001-04-10
2003-04-01
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Interface
Logic level shifting
C326S081000, C363S059000, C363S060000, C363S062000, C257S256000, C257S274000, C257S287000
Reexamination Certificate
active
06542001
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the complete power supplier or DC to DC converter that is built by Integrated Circuits (IC) process. This invention can be used as the add-on module or embedded power supply for the System-on-Chip ICs. This invention discloses four-terminal switchers integrated with built-in capacitors by providing step-down or step-up DC to DC conversions by switching capacitors method.
2. Description of the Prior Art
The concept of switching capacitors for power conversion was one of the original concepts for the energy conversion. However, due to unavailability of very low on resistance and low cost semiconductor switcher, this approach has not been realized for the electronic equipment. Most of the power suppliers and DC to DC converters available today are using transformers, inductors, and capacitors for the energy conversion in conjunction with rectifiers, MOS transistors, bipolar, transistors and/or integrated circuits. Marek S. Makowski et al published an article, “Performance Limits of Switched-Capacitor DC-DC Converters”, P. 249, Power Electronics Technology and Applications, Edited by Dr. Fred C. Lee, IEEE TK7881.15, 1997. In this article, theoretical performance limits of switching capacitor DC-DC converter are calculated. It is clearly indicated in this article that the overall efficiency of the converter is a function of the contact resistance of the switcher. A contact resistance of 2 ohms was used in the calculation; therefore, the low efficiency of this kind of converter is resulted. No structure or description of the switcher is discussed in this article. The inventor, Ho-Yuan Yu, has submitted several patent ideas to patent office: 1) “Low On Resistance Transistors and the Method of Making”, Filed in Patent Office of Disclosed Document Program, Sep. 24, 1998, #444899. It disclosed low on resistance Junction Field Effect Transistor (JFET) device structure and the fabrication steps for normally “on” JFETs. 2) “Novel Structure of JFETs for Low Voltage Applications, Filed in Patent office of the Disclosed Document Program, Sep. 16, 1998, #444874. This is a normally “off” or enhancement mode Junction Field Effect Transistors (JFETs) to provide low on resistance in “on” state. Above two patent concepts have been combined and filed under Provisional Application No. 60/115,009 of Jan. 6, 1999. The utility application of above patent was filed on Oct. 28, 1999. 3) “Switcher for Switching Capacitors, Filed in Patent office of the Disclosed Document Program, Nov. 30, 1998 and filed Provisional Application No. 60/111,625 of Dec. 9, 1998.
Based on above disclosures, this patent application is to integrate above device structures with the built-in capacitors in the IC to form the embedded power supply that can be made by CMOS IC process. It also can be used as the module or block along with standard integrated circuits for the System-on-Chip ICs.
SUMMARY OF THE PRESENT INVENTION
This invention comprises pairs of four-terminal switchers in conjunction with the built-in capacitors to provide step-down or step-up DC to DC converters or power suppliers. The switcher is comprised as a four-terminal device with a control gate. The switchers provide the function of connecting an array of capacitors in series configuration during charging and in parallel configuration during discharging for step-down power conversion. In the similar principle, this switcher connects an array of capacitors in parallel configuration during charging and in series configuration during discharging, a step-up function is provided. The switcher is using normally “off” Junction Field Effect Transistors (JFETs) or enhancement mode JFETs with N-channel and P-channel structure. The detail structure of this switcher is disclosed in Patent Office of Disclosed Document Program mentioned earlier.
The four terminal switchers are built in the isolated N-well (or P-well depending on the process). The capacitors are built between, on the side, or on the top of the switcher by using trench or stacked-up structures. Therefore, the built-in power supplier or DC to DC converter blocks can be readily implemented into the system.
REFERENCES:
patent: 5581454 (1996-12-01), Collins
patent: 6169673 (2001-01-01), McIntyre et al.
Lovoltech Inc.
Tan Vibol
Tokar Michael
Wagner , Murabito & Hao LLP
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