Power semiconductor module of high isolation strength

Details Power semiconductor module of high isolation strength Power semiconductor module of high isolation strength

2001-12-20

2002-10-22

Clark, Sheila V. (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

28, 28

Reexamination Certificate

active

06469378

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a power semiconductor module consisting of a ceramic substrate with metal coating on both sides, with at least one semiconductor component, with connections required for contact, and packaging.
2. Description of the Related Art
In comparison with discrete power switches (such as sliced cells, T0220) power semiconductor modules with or without base plate offer the great advantage of internal isolation from a heat sink. This internal isolation is achieved by using ceramic substrates with metal coatings on both sides, which combine both high isolation strength with great thermal conductivity. This design allows efficient design of power circuits since they provide not only base isolation (isolation from the environment), but also functional isolation (the isolation of various regions of a circuit on which components are mounted).
The definitions of the technical terms used in this related art may be found in Chapter 1 in König, Rao: “
Teilentladungen in Betriebsmitteln der Energietechnik
” [Partial Discharge in Power Technology Facilities], published by VDE Verlag, 1992, ISBN 3-8007-1764-6.
Power semiconductor modules, which are the starting point of this invention, are sufficiently known.
Germain registration DE 196 51 632 discloses a power semiconductor module with ceramic substrate and a base plate. Both EP 0 750 345 and DE 197 00 963 disclose power semiconductor modules with ceramic substrates without base plates. DE 43 10 466 discloses pressure-bonded configurations with ceramic substrates. It is additionally understood from disclosures in U.S. Pat. No. 5,466,969, that additional components, such as sensors and/or drive circuits, may be integrated in a power module.
These developments in prior-art power semiconductors all have in common the use of a ceramic substrate with metal coatings on both sides. This ceramic substrate is produced by a spinel bond between aluminum oxide (Al
2
O
3
) and copper oxide according to a “direct copper bonding” (DCB) process, as described in EP 0 627 760, or according to an active metal brazing (AMB) process.
In addition to copper, it is also conceivable to use aluminum or silver metallization in a similar manner. Methods are also being developed in which an aluminum layer, with aluminum nitrite (AIN) as a ceramic material, is applied to the ceramic material by means of a sintering process. Subsequently, a further metal layer, for example copper, may also be deposited on the aluminum layer.
It is also typical for this type of power semiconductor modules to be filled with a material such as a monomer of silicone rubber that is polymerized after degasification. This silicone rubber ensures isolation.
In all known configurations of these substrates, the surface with the metal coating is smaller than the ceramic surface, which leaves a non-coated surface at the edges of the substrates. Typically this width, and thus the distance from the edge of the metal coating to the edge of the ceramic surface, is the same as the first surface holding the components, which faces away from the heat sink or the base plate and the is same as the second surface which faces the heat sink or the base plate.
Alternatively, the edge of the coating of the second surface is closer to the edge of the ceramic than that of the first surface. This difference is due to the fact that in pressure-bounded power semiconductor modules, for example, where the prime object of the development is a good thermal contact with a heat sink, pressure forces are acting upon the substrate on the peripheral region. Under these circumstances, to prevent the ceramic from breaking, the second coating is applied so that it comes close to the edge of the ceramic. As disclosed in U.S. Pat. No. 5,466,959, additional drive circuits are positionable on the first surface of the substrate. In this case, the metal coating may be left out below the surface used for the drive, to achieve a reduced capacitive coupling.
Generally, requirements for the isolation strength of base isolation are much higher than for the isolation strength of functional isolation. Thus, IEC 1287 requires the following test voltage for base isolation:
U
iso
,
rms
=
2
·
U
m
2
+
1000
⁢
 
⁢
V
(
I
)
where U
m
represents the maximum constantly recurring voltage in the circuit. Voltage U
iso,rme
must be applied for one minute during the test of the component (power semiconductor module). The isolation quality of the base isolation depends on how the peripheral region of the ceramic is configured.
In prior art, the peripheral region of the substrate is configured so that the width of the surface between the edge of the metal coating of the first surface and the edge of the ceramic is the same or larger than the width of the surface between the edge of the metal coating of the second surfaces and the edge of the ceramic.
As disclosed in U.S. Pat. No. 5,466,969, the peripheral region of the power component of the circuit arrangement has this type of configuration. Unfortunately, this configuration has disadvantages for the isolation quality of the substrate's base isolation.
In this type of device, the metal coatings of the two ceramic surfaces act as a plate condensator with the ceramic as a dielectric between the plates. Typically, the metal coating lies on a base plate or a heat sink and thus at a defined reference potential.
The different parts of the metal coating of the first surface may have different potentials. In related art, the metal coatings for optional drive circuits or sensors, etc. often have ground potential. When the power semiconductor module on a normally metallic heat sink is arranged at reference potential that does not necessarily correspond to the ground potential, the result is a very inhomogeneous field path for the electric field in the outer region of the plate condensator.
A high density of equipolar lines represents a high field strength. The isolation quality of the base isolation of the non-coated peripheral region of the ceramic or the region between a metal coating of the first surface which lies between a high potential and another potential, is determined by the field strength directly on the surface, tangentially to the first surface. This field strength is represented by the tangential distance of the equipotential lines.
The highest density of equipotential lines on the ceramic surface, and thus the most critical region for the isolation strength of the base isolation, is on the first surface of the ceramic immediately following the surface of the metal coating with the high potential.
The configuration of the peripheral region of a substrate has a decisive effect on the isolation and partial-discharge strength of power semiconductor modules. This effect is less significant in the case of thinner ceramic layers. With a ceramic thickness of 0.38 mm, (which is customary today), this effect becomes dominant above 5000 V.
With the integration of the above mentioned additional functions into the power semiconductor module, the isolation of these components, which are directly on the substrate, becomes another important characteristic of reliability.
Since, for example, the sensor signals are being evaluated directly by the drive circuits, an electrical separation between the power circuit and the sensor must be ensured for proper operation. This electrical separation is achieved by means of an arrangement of two metal coatings isolated from each other. Within the power circuit, only a functional isolation must be ensured for metal coatings thus isolated from each other. On the other hand, a base isolation must be established for the additional integrated functions (such as sensors).
In general, the requirements for base isolation are higher, depending on the particular application. For example, in the series-connection of power semiconductor modules, the reference potential of an individual power semiconductor module dos not have to be identical to the ground potential. However, since for

Affiliated with

Also associated with

Rating

Power semiconductor module of high isolation strength does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Power semiconductor module of high isolation strength, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Power semiconductor module of high isolation strength will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2971204