Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Patent
1994-12-21
1997-04-01
Dang, Trung
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
148DIG12, 148DIG50, 438459, 438424, 438355, H01L 2176
Patent
active
056165129
ABSTRACT:
A process for manufacturing integrated circuits includes the following steps. First, an oxide layer is formed on at least one surface of two respective semiconductor material wafers. Next, a single semiconductor material wafer is obtained with a first layer and a second layer of semiconductor material and a buried oxide layer interposed therebetween starting from said two semiconductor material wafers by direct bonding of the oxide layers previously grown. The single wafer is submitted to a controlled reduction of the thickness of the first layer of semiconductor material and the top surface of the first layer of semiconductor material is lapped. Dopant impurities are selectively introduced into selected regions of the first layer of semiconductor material to form the desired integrated components. Trenches are formed laterally delimiting respective portions of the first layer of semiconductor material wherein integrated components are present which are to be electrically isolated from other integrated components. Finally the walls of the trenches are coated with an insulating material and filled with amorphous silicon.
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Dang Trung
Driscoll David M.
Morris James H.
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