Power semiconductor device manufactured using a chip-size...

Details Power semiconductor device manufactured using a chip-size... Power semiconductor device manufactured using a chip-size...

2002-04-25

2004-09-14

Clark, Jasmine (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

C257S691000, C257S692000, C257S693000

Reexamination Certificate

active

06791172

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a power semiconductor device, and more particularly to a power semiconductor device manufactured using a chip-size package.
2. Description of the Related Art
FIG. 1
shows a traditional power diode device. As shown in
FIG. 1
, a power diode die
10
has a p-type terminal
10
′ and an n-type terminal
10
″. A first lead
12
has a first terminal
12
′ and a second terminal
12
″. The first terminal
12
′ is connected to the P-type terminal
10
′ through a solder
16
. A second lead
14
has a first terminal
14
′ and a second terminal
14
″. The first terminal
14
′ is connected to the N-type terminal
10
″ through a solder
18
. A packaging material
15
is used to package the power diode die
10
, the first terminals
12
′ and
14
′ of the leads
12
and
14
and the solder
16
and
18
.
The size of the traditional power semiconductor (for example, power diode) is much larger than that of the power diode die
10
. Consequently, the traditional power semiconductor does not meet light, thin and small design requirements in the current semiconductor market.
SUMMARY OF THE INVENTION
In view of the above, an object of the present invention is to provide a power semiconductor device manufactured using a chip-size package. The advantages of a power semiconductor device manufactured using a chip-size package according to the present invention arise from the size of the power semiconductor device of the present invention being much smaller than that of the traditional power semiconductor devices, and from the leads being formed on the same plane, suitable for current surface mounting technology.
A power semiconductor device manufactured using a chip-size package according to the present invention includes a power semiconductor die having a first surface with a first surface terminal and a second surface with a second surface terminal opposite to the first surface, at least one lead frame, the lead frame having a first terminal and a second terminal, the first terminal electrically connected to the first surface terminal of the first surface or the second surface terminal of the second surface of the die, an electrically conductive plate electrically connected to the second surface terminal of the die and a packaging material used for encapsulating the die, one terminal of the at least one lead frame and the electrically conductive plate. The second terminal of said at least one lead frame and a surface of the conductive plate that is not connected to the second surface terminal of the die are exposed to the outside of the packaging material and on the same plane.


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