Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-09-17
2003-06-17
Eckert, George (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S173000, C257S356000, C257S546000
Reexamination Certificate
active
06580121
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to power semiconductor devices used as components for controlling power supplies in mobile devices such as mobile phones and digital still cameras, in peripheral devices of personal computers (e.g., liquid-crystal or CRT displays, printers, video tape recorders and DVD players), or in electronic devices mounted on vehicles, and relates more particularly to a power semiconductor device which has MOS-structure semiconductor elements (such as vertical power MOSFETs or IGBTs) with relatively-low withstand voltage (of e.g., less than 200 V) and at least one Zener diode, or input protection circuit, provided between a gate of the MOS-structure semiconductor elements and one main electrode thereof (a source of the vertical power MOSFETs or a cathode of the IGBTs).
2. Description of the Background Art
Conventionally, power-supply voltages of 10 V, 4 V or 2.5 V have been used to drive the power semiconductor devices for controlling the power supply. In the recent markets, however, particularly in the field of mobile devices such as mobile phones, the demand for lower-voltage-driven power semiconductor devices which are driven at 2.5 V or 1.5 V is escalating for the requirement of controlling charge and discharge of lithium-ion battery with lower consumption power. The markets are also intensively demanding, as well as the driving voltage reduction, improvements in device performance of the power semiconductor devices, such as on-state voltage reduction through reduction in on-state resistance of the MOS-structure semiconductor elements, and capacity reduction through further reduction in chip size. Moreover, the market and law regulations are even demanding that the power semiconductor devices should be equipped with input protection circuits for protecting gate insulating films of the MOS-structure semiconductor elements from various noises, such as static electricity produced from human body during handling of the devices or that produced from machines, lightning, electromagnetic waves and inrush currents produced during operation of car starters. For measures against such noises as static electricity, the power semiconductor devices are required to satisfy, for example, the EIAJ standards (Electronic Industries Association of Japan). That is to say, the HBM (Human Body Method) requires the products to meet the withstand voltage standard of 1000 V, and the MN (Machine Method) requires withstand voltage of 100 V or higher. As the markets are demanding products having higher withstand voltage characteristics, it is an urgent need to realize power semiconductor devices having withstand voltage characteristics superior to those required by the EIAJ standards.
To satisfy such demands from customers, recent power-supply-controlling power semiconductor devices are even equipped with Zener diodes as the input protection circuits for protecting the MOS-structure semiconductor elements. For example, as the market for mobile phones grows, chips having an area of 2 mm
2
and input capacity which corresponds to 1000 pF have been appearing on the market as Zener-diode-containing vertical power MOSFET devices. In the field of mobile phones where the products have withstand voltages of 20 to 30 V, particularly, there is an intensive demand for products with lower withstand voltage and lower on-state resistance.
FIG. 20
is a plan view showing a Zener diode forming an input protection circuit for trench-type n-type MOSFETs, where the shape of a gate electrode
6
PP is depicted schematically rather than exactly.
FIG. 21
is the vertical section taken along the line AP-BP in FIG.
20
. For convenience of description,
FIG. 20
does not show a passivation film
10
PP shown in FIG.
21
.
In
FIGS. 20 and 21
, a semiconductor substrate
100
PP is composed of an N
+
substrate
9
PP and an N
−
epitaxial layer
8
PP; a surface of the N
−
epitaxial layer
8
PP, which forms a main surface of the semiconductor substrate
100
PP, is covered by an insulating film
7
PP, and an N
+
type layer
1
PP
1
is formed on a surface
7
SPP of the insulating film
7
PP. A P type layer
31
PP is formed along the periphery of the N
+
type layer
1
PP
1
and thus entirely surrounds it, an N
+
type layer
32
PP is formed along the periphery of the P type layer
31
PP and thus entirely surrounds it, and a P type layer
33
PP is formed along the periphery of the N
+
type layer
32
PP and thus entirely surrounds it; the layers
31
PP,
32
PP and
33
PP form a PN junction region
3
PP. Further, an N
+
type layer
1
PP
2
, the outermost layer, is formed along the periphery of the PN junction region
3
PP and thus entirely surrounds it. In this way, the semiconductor regions are formed so that the N
+
type layer
1
PP
1
in the center is surrounded by the P type and N type layers in series, thereby forming a Zener diode
11
PP having an N
+
-P-N
+
-P-N
+
structure. The passivation film
10
PP is formed on the surface of the Zener diode
11
PP; the passivation film
10
PP has a gate-side contact region
4
PP formed over the N
+
type layer
1
PP
1
and a source-side contact region
2
PP formed over the N
+
type layer
1
PP
2
. A gate electrode
6
PP is formed in the gate-side contact region
4
PP, and a source electrode
5
PP is formed in a surface of the passivation film
10
PP around a gate pad formation region and fills the source-side contact region
2
PP. A drain electrode
12
PP is formed on a back surface of the N
+
substrate
9
PP.
As described above, in the conventional Zener-diode-containing vertical power MOSFET device, the Zener diode
11
PP having N
+
-P-N
+
-P-N
+
structure is provided right under the gate pad and its vicinity in the main surface of the semiconductor substrate
100
PP.
When applying wire-bonding to the gate electrode in the gate pad so as to package the IC, gold (Au) wire having a diameter of 50 &mgr;m is usually used. For this process, a square gate pad must be sized to offer an area which corresponds to 200 &mgr;m×200 &mgr;m at least.
Suppose that a Zener diode is formed as shown in
FIGS. 20 and 21
right under a gate pad having an area which corresponds to 200 &mgr;m×200 &mgr;m and in its vicinity in a vertical power MOSFET device (the peripheral length of the gate pad is 0.8 mm). When the electrostatic strength of this vertical power MOSFET device is measured by using an electrostatic strength testing circuit for HBM as shown in
FIG. 22
, it shows the current-voltage (I-V) characteristic as shown by the broken line in FIG.
6
. That is to say, since the withstand voltage value of the Zener diode increases in proportion to the current, the voltage value may exceed the breakdown voltage limit of the gate insulating film, depending on the current value. Accordingly, in this case, the provision of the Zener diode offers no effect at all. Furthermore, as shown in
FIG. 23
(
FIG. 23
shows data which has not been disclosed before and it plots the lowest values of the measurements), the operating resistance, or the series resistance, of the Zener diode in this case is about 100 &OHgr;, in which case the electrostatic strength (HBM(+)) is even lower than 1000 V, which is far from satisfying the desired standard value (=1500 V) which the inventor of this invention expects. It is thus understood that disposing a Zener diode right under, and in the vicinity of, the gate pad having a peripheral length of 0.8 mm provides no effect.
Accordingly, the inventor of this invention carried out attempts to increase the area or the peripheral length of the gate pad, i.e., to increase the area of a Zener diode formation region right under the gate pad.
FIG. 24
shows the tested results (data which has not been disclosed before). As shown in
FIG. 24
, as the gate pad area or the PN junction width of the Zener diode increases (the PN junction width is the length along the periphery of a PN junction face), the
Eckert George
Mitsubishi Denki & Kabushiki Kaisha
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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