Power semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S139000, C257S140000, C257S305000, C257S341000, C257S630000, C257S700000

Reexamination Certificate

active

06414362

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a power semiconductor device, more particularly to a power semiconductor device having a comb-shaped source contact and a plurality of gate contacts that are electrically isolated from the source contact.
2. Description of the Related Art
FIGS. 1 and 2
illustrate a conventional power semiconductor device. The power semiconductor device includes a semiconductor die
11
which includes a plurality of transistors (not shown). Each transistor includes a source electrode, a drain electrode, and a gate electrode. The die
11
has a bottom surface that defines a drain contact
113
connected to the drain electrodes of the transistors, and a top surface that includes a comb-shaped first metallized region defining a source contact
111
, a second metallized region defining a primary gate contact
112
, a comb-shaped partitioning region
115
′ having a plurality of spaced apart branches
115
, and a plurality of spaced apart third metallized regions (not shown) defining a plurality of secondary gate contacts and disposed in the branches
115
of the partitioning region
115
′. The source contact
111
is connected to the source electrodes of the transistors, and has a plurality of grooves
117
and a plurality of non-grooved parts disposed respectively between two adjacent ones of the grooves
117
. The branches
115
of the partitioning region
115
′ are respectively confined by the grooves
117
. The primary gate contact
112
and the secondary gate contacts of the third metallized regions are connected to the gate electrodes of the transistors.
The power semiconductor device further includes a bottom metal plate
12
coupled to and electrically connected to the drain contact
113
, a plurality of drain terminals
123
extending outwardly from the bottom metal plate
12
to permit electrical connection with the drain contact
113
, a plurality of source terminals
121
electrically connected to the source contact
111
via a metal sheet
13
, a gate terminal
122
electrically connected to the primary gate contact
112
via a conductive piece, and a comb-shaped conductive path
114
connected to the primary gate contact
112
and having a plurality of fingers
1141
that extend respectively into the branches
115
of the partitioning region
115
′ to connect with the secondary gate contacts of the third metallized regions.
Each finger
1141
of the conductive path
114
is enclosed by an insulation layer
116
, such as a glassivation layer. The metal sheet
13
covers most part of the source contact
111
and the branches
115
of the partitioning region
115
′, and is attached to the source contact
111
via a conductive paste
14
that covers the branches
115
of the partitioning region
115
′. Each finger
1141
of the conductive path
114
is isolated electrically from the conductive paste
14
by the respective insulation layer
116
.
The aforesaid power semiconductor device is disadvantageous in that since the die
11
generates heat during operation, thereby resulting in an increase in the temperature of the die
11
, and since the insulation layer
116
at each finger
1141
of the conductive path
114
is covered with the conductive paste
14
and the metal sheet
13
, formation of crevices
10
can take place in the insulation layer
116
because of stress, that results from different thermal expansions of the metal sheet
13
, the conductive paste
14
and the insulation layer
116
. The crevices
10
in the insulation layer
116
may be filled with moisture and/or deposits which can become conductive and which can electrically interconnect the fingers
1141
of the conductive path
114
and the conductive paste
14
, thereby resulting in a short circuit among the gate electrodes and the source electrodes. Moreover, since the conductive paste
14
is covered by the metal sheet
13
, there is also a tendency for the conductive paste
14
to have crevices formed thereinside because of the thermal expansion and contraction of the conductive paste
14
and the metal sheet
13
, thereby resulting in an unstable performance in the electrical resistance of the device.
SUMMARY OF THE INVENTION
Therefore, the object of the present invention is to provide a power semiconductor device that is capable of overcoming the aforementioned problems.
According to the present invention, a power semiconductor device comprises: a semiconductor die that has a bottom surface defining a drain contact, and a top surface which includes a first metallized region defining a source contact and having at least a first groove and a first non-grooved part, a second metallized region defining a primary gate contact, a partitioning region having at least a branch confined by the first groove, and a third metallized region disposed in the branch of the partitioning region and defining a secondary gate contact; a conductive strip extending from the primary gate contact and having a finger that extends in the branch of the partitioning region and that is connected to the secondary gate contact of the third metallized region; an insulation layer enclosing the finger of the conductive strip; a conductive connecting member including a metal sheet and a conductive paste, the metal sheet having a second groove which is aligned with the branch of the partitioning region, and a second non-grooved part which is attached to the source contact at the first non-grooved part of the first metallized region via the conductive paste such that the insulation layer is exposed from the second groove; a drain terminal electrically connected to the drain contact of the die; a source terminal electrically connected to the second non-grooved part of the metal sheet; and a gate terminal electrically connected to the primary gate contact of the die.


REFERENCES:
patent: 3950777 (1976-04-01), Tarui et al.
patent: 4862239 (1989-08-01), Broich et al.
patent: 5703383 (1997-12-01), Nakayama
patent: 5736760 (1998-04-01), Hieda et al.

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