Power saving terminated bus

Details Power saving terminated bus Power saving terminated bus

1995-03-29

1996-06-18

Westin, Edward P.

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

326 86, 375257, H03K 1716, H03K 19003

Patent

active

055281680

ABSTRACT:
A bus termination method and apparatus, specifically, a terminator circuit, a driver/terminator circuit, and appropriate control logic. The terminator circuit and the driver/terminator circuit provide termination of an interface node to one of a first and a second voltage potential selected according to a previous logic value sampled on the input node at a time determined by a clock signal. The driver/terminator circuit also drives data values on the interface node. The terminator circuit and the driver/terminator circuit can be used in bus agents in a computer system. In one computer system configuration, a driving bus agent drives a signal line which is terminated by a predetermined terminating bus agent. Each bus agent compares its device identification to a bus master identification to determine whether to drive, terminate, or tristate the bus.

REFERENCES:
patent: 4251742 (1981-02-01), Beelitz
patent: 5023488 (1991-06-01), Gunning
patent: 5089723 (1992-02-01), Davis et al.
patent: 5313105 (1994-05-01), Samela et al.
patent: 5336948 (1994-08-01), Jordan
patent: 5347177 (1994-09-01), Lipp
"Regular Brief Papers--A Dynamic Line-Termination Circuit for Multireceiver Nets", Michael Dolle, IEEE Journal on Solid-State Circuits, vol. 28, No. 12, Dec. 1993, pp. 1370-1373.
"A 500-Megabyte/s Data-Rate 4.5M DRAM", Kushiyama, et al., IEEE Journal of Solid-State Circuit, vol. 28, No. 4, Apr. 1993, pp. 490-498.
"WP 3.7: A CMOS Low-Voltage-Swing Transmission-Line Transceiver", Gunning, et al., 1992 IEEE International Solid-State Circuits Conference, pp. 58-59.

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