Power-saving clock control apparatus and method

Details Power-saving clock control apparatus and method Power-saving clock control apparatus and method

1998-08-04

2000-06-06

Heckler, Thomas M.

Electrical computers and digital processing systems: support

Computer power control

Power conservation

713501, G06F 132

Patent

active

06073244&

ABSTRACT:
A clock control type information processing apparatus of the invention selects clock frequency according to load state, which reduces electric power consumption without substantially reducing the effective performance of the program. The clock control type information processing apparatus including a central processing unit for executing programs and a plurality of peripheral processing units connected to the central processing unit using a bus, includes a clock generating unit for generating clock signals having a plurality of frequencies and selectively supplying any one of the clock signals to the central processing unit and the peripheral processing units, a bus access monitoring unit for monitoring load state of the bus which connects the central processing unit with the peripheral processing units; and a clock selection control unit for generating control signals to control the clock frequencies generated by the clock generating unit according to the load state of the bus.

REFERENCES:
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patent: 5142247 (1992-08-01), Lada, Jr. et al.
patent: 5493684 (1996-02-01), Gephardt et al.
patent: 5511203 (1996-04-01), Wisor et al.
patent: 5585750 (1996-12-01), Noguchi et al.
patent: 5586332 (1996-12-01), Jain et al.
patent: 5628001 (1997-05-01), Cepuran

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