Power-saver differential input buffer

Details Power-saver differential input buffer Power-saver differential input buffer

1994-01-31

1995-08-08

Hudspeth, David R.

Electronic digital logic circuitry

Interface

Logic level shifting

326121, H03K 19094

Patent

active

054402484

ABSTRACT:
An input circuit designed for a semiconductor device. A first input buffer (14) receives a control signal EN, an input signal IN, and a reference signal VREF, for producing a first output signal OUT.sub.1 in response the control signal and a difference between the input signal and the reference signal. A second input buffer (16) receives the control signal and the input signal, for producing a second output signal OUT.sub.2 in response to the control signal and the input signal. A control circuit (22) produces the control signal, in response to a predetermined output state.

REFERENCES:
patent: 4472647 (1984-09-01), Allgood et al.
patent: 4504747 (1985-03-01), Smith et al.
patent: 4527079 (1985-07-01), Thompson
patent: 4563601 (1986-01-01), Asano et al.
patent: 4612460 (1986-09-01), Gloaguen et al.
patent: 4707623 (1989-11-01), Bismarck

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