Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate
1998-12-15
2001-04-17
Ray, Gopal C. (Department: 2181)
Electrical computers and digital processing systems: support
Computer power control
Power conservation
C713S324000, C712S214000
Reexamination Certificate
active
06219796
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates to microprocessors, and more particularly to methods of using programming instructions in a manner that reduces the power consumption of a microprocessor.
BACKGROUND OF THE INVENTION
Power efficiency for processor-based equipment is becoming increasingly important as people are becoming more attuned to energy conservation issues. Specific considerations are the reduction of thermal effects and operating costs. Also, apart from energy conservation, power efficiency is a concern for battery-operated processor-based equipment, where it is desired to minimize battery size so that the equipment can be made small and lightweight. The “processor-based equipment” can be either equipment designed especially for general computing or equipment having an embedded processor.
For the standpoint of processor design, a number of techniques have been used to reduce power usage. These techniques can be grouped as two basic strategies. First, the processor's circuitry can be designed to use less power. Second, the processor can be designed in a manner that permits power usage to be managed.
In the past, power management has been primarily at the system level. Various “power down” modes have been implemented, which permit parts of the system, such as a disk drive, display, or the processor itself to be intermittently powered down.
The entry of a device into a power down mode can be initiated in various ways, such as in response to a timer or in response to an instruction from the processor. In the case of the former, the timer automatically shifts the device into a power down mode after it has been inactive for a preset period. In the case of the latter, i.e., instruction-implemented power management, various standards have been developed to place power management under processor control. One such standard is the Advanced Power Management interface specification, developed jointly by Intel and Microsoft.
One approach to processor power management is described in U.S. Pat. No. 5,584,031, entitled “System and Method for Executing a Low Power Delay Instruction”. A special instruction (a “sleep” opcode) specifies a number of timing cycles during which activity of the central processing unit is delayed.
Another approach to processor power management is described in U.S. Pat. No. 5,495,617, entitled “On Demand Powering of Necessary Portions of Execution Unit by Decoding Instruction Word Field Indications Which Unit is Required for Execution”. An instruction decoder differentiates “control” instructions from “execute” instructions. If the instruction is a “control” instruction, it does not involve the execution unit, and a standby signal can be sent to the execution unit.
SUMMARY OF THE INVENTION
One aspect of the invention is a method of optimizing a computer program for reduced power consumption. The method is used with programs written for a processor having distinct “functional units” to which instructions may be independently directed. The processor's instruction set is modified so as to provide special “power-down” instructions that may be directed to one or more functional units independently of other functional units. Then, for each functional unit, the computer program is scanned to locate segments of the program where that functional unit is not used. Based on the results of the scanning step, power-down instructions are inserted into the program, such that the functional unit uses less power while not in use. The method can be performed manually by an assembly language programmer or by a code optimization program.
An advantage of the invention is that it provides power management at an “on-chip” level, as compared to a computer system level. The level of power management is “fine-grained”, being directed to components within the processor. Power management can be directed even to functional units within the processor's CPU.
A further advantage is that when a power-down instruction is used in accordance with the invention, the rest of the processor is fully operational. The program continues to execute as if the instructions were not there, because only functional units that are not used are affected. Thus, when inserted into a particular application program, the power-down instructions operate transparently to the programming in terms of both function and execution time.
Selective power management of functional units within a processor facilitates the use of specialized on-chip circuitry. Examples are circuits for performing special functions such as floating point operations, Fourier transforms, and digital signal filtering. Such circuits can be included on-chip and only consume power when used. Thus, in today's manufacturing environment, where such circuits are less and less expensive to include on-chip, power consumption need not be a drawback to including them.
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Brady III W. James
Marshall, Jr. Robert D.
Ray Gopal C.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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