Power-on reset circuit with adjustable interval

Details Power-on reset circuit with adjustable interval Power-on reset circuit with adjustable interval

1998-05-01

2000-03-21

Zweizig, Jeffrey

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327198, H03L 700

Patent

active

060407220

ABSTRACT:
A power-on reset circuit is provided for generating a power-on reset signal for sequential logics or memory devices as a power supply potential is applied initially. The power-on reset circuit is provided in the same chip as the sequential logics, and generates the signal after an adjustable time interval. The power-on reset circuit includes an oscillator for generating a clock signal, and a counter for counting pulses of the clock signal from when the power supply potential is applied. The time interval is adjusted by loading a preset data value in the counter, which thus outputs a CTR signal when the counted pulses become equal in number to the preset number. A combinational logic circuit resets the counter when the power supply potential is initially applied, and also generates a power-on reset signal when the counter outputs the CTR signal. The power on reset signal further disables the counter, so that the CTR signal is maintained.

REFERENCES:
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patent: 5369311 (1994-11-01), Wang et al.
patent: 5408139 (1995-04-01), Hayano
patent: 5414307 (1995-05-01), Brandmaier
patent: 5442310 (1995-08-01), Bazes
patent: 5510741 (1996-04-01), Childs
patent: 5513358 (1996-04-01), Lundberg et al.
patent: 5559458 (1996-09-01), Holler, Jr.

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