Power network synthesizer for an integrated circuit design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

active

07353490

ABSTRACT:
A plan for a power network for an integrated circuit device is automatically preparing in two stages. In a first stage, a number of simplified plans are prepared on a global scale, without regard to design rule checking constraints and routing blockages. Next, the simplified plans are evaluated to select a plan that conforms to a user-specified limit for an attribute, such as maximum voltage drop. The selected simplified plan, which identifies a total count of power wires and a width of the power wires, is used in a second stage to prepare a more detailed plan that honors the design rule checking constraints and routing blockages. The detailed plan is evaluated to check for conformance with the user-specified limit on the attribute, and if necessary the detailed plan is changed, e.g. by increasing wire width one or more times, to achieve conformance.

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