Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With electrical contact in hole in semiconductor
Reexamination Certificate
2000-07-14
2002-10-01
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With electrical contact in hole in semiconductor
C257S513000, C257S514000, C257S520000, C257S774000, C257S328000, C257S302000, C257S330000
Reexamination Certificate
active
06459142
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention lies in the semiconductor technology field. More specifically, the invention relates to a power MOSFET having a semiconductor layer, which is arranged on a highly doped semiconductor substrate of a first conductivity type, is itself of the other conductivity type, in which a highly doped source zone of the other conductivity type and a highly doped drain zone of the other conductivity type are formed. A gate electrode is provided above the semiconductor zone of the first conductivity type.
In power MOSFETs, the cooling of the MOSFET and heat dissipation from the semiconductor body play a crucial role. This would be very simple if, for example in the case of an n-channel MOSFET, its semiconductor substrate, which may be equipped with a cooling fin, could be screwed directly onto a body which absorbs heat, such as the bodywork of an automobile. A precondition for this that the semiconductor substrate and, with it the source zone, may be at zero volts without adversely affecting the other characteristics of the MOSFET, that is say, for example, without it having an excessively high switch-on resistance.
SUMMARY OF THE INVENTION
The object of the invention is to provide a power MOSFET which overcomes the above-noted deficiencies and disadvantages of the prior art devices and methods of this kind, and the semiconductor substrate of which can be cooled at a voltage of 0 volts, and the power MOSFET does not have an excessively high switch-on resistance.
With the above and other objects in view there is provided, in accordance with the invention, a power MOSFET, comprising:
a highly doped semiconductor substrate of a first conductivity type;
a semiconductor layer of a second conductivity type on the semiconductor substrate;
a highly doped source zone of the second conductivity type and a highly doped drain zone of the second conductivity type formed in the semiconductor layer;
a semiconductor zone of the first conductivity type and a gate electrode above the semiconductor zone; and
a highly conductive connection between the source zone and a surface of the semiconductor substrate opposite the semiconductor layer.
In other words, the novel power MOSFET has a highly conductive connection between the source zone and the semiconductor substrate. This highly conductive connection may be, in particular, a metallically conductive connection.
In the present invention, the metallically conductive connection is provided between the source zone on one face surface of the power MOSFET and the opposite surface of the semiconductor substrate, so that the semiconductor substrate and, with it the source zone, can be screwed, for example by means of a cooling fin other similar heat sink, onto a base, for example the bodywork of an automobile, with the semiconductor substrate, and thus the source zone, being at 0 volts. With the semiconductor substrate in such a structure, the source zone is “at the bottom”, for which reason this is referred to as a “source-down” FET.
The actual MOSFET may have a conventional structure in the semiconductor layer, in which the gate electrode is embedded in an insulator layer provided on the semiconductor layer. However, it also possible for the gate electrode to be accommodated in a trench in the semiconductor layer, with, for example, the edge of such a trench being lined with an insulator layer composed of silicon dioxide or silicon nitride, and whose interior is filled with doped polycrystalline silicon.
The conductive connection between the source zone and the semiconductor substrate may be formed from a highly doped semiconductor zone of the first conductivity type. However, it is also possible for this conductive connection to provide a trench out of which dopant of the first conductivity type is then diffused, and which is filled with polycrystalline or monocrystalline silicon. Another option for the configuration of the conductive connection comprises a trench which is at least partially filled with metal or a highly conductive layer. Titanium nitride may preferably be used for such a layer. Apart from this, the interior of the trench can be filled with polycrystalline silicon, which is doped with dopant of the other conductivity type.
The semiconductor substrate itself may be provided directly with a cooling device, for example a cooling fin, which can be screwed onto a base. This results in particularly effective heat dissipation.
The semiconductor layer is preferably more lightly doped between the drain zone and the gate electrode than in the drain zone. This allows the MOSFET to be operated at higher voltages. Such operation is also assisted if the distance between the drain zone and the edge of the gate electrode is at least 0.1 &mgr;m to approximately 5 &mgr;m. The thickness of the insulator layer should also preferably increase continuously or in steps in the direction of the drain zone.
The contact between the highly doped source doped zone and the conductive connection may be produced by means of a buried metal, for example a silicide or some other conductive layer, for example composed of titanium nitride.
The insulator layer, which is composed of silicon dioxide, is deposited over the short-circuit point between the highly doped source zone and the conductive connection. It is also possible to interrupt the metalllization there for the drain zone, that is to say for example an aluminum layer.
The gate electrodes may be arranged like a grid and a “network” composed of polycrystalline silicon of the other conductivity type is formed, which is embedded in the insulator layer composed of silicon dioxide or some other material, such as silicon nitride.
The highly doped drain zones of the other conductivity type preferably make contact with a metal layer over the entire surface and composed, for example, of aluminum which may be in the form of a grid, if the individual source zones have an aluminum short circuit which extends up to their surface.
There should be a distance of between several tenths of 1 &mgr;m and 5 &mgr;m in the insulator layer, between the highly doped drain zone of the other conductivity type and the edge of the gate electrode, which is composed of polycrystalline silicon, in order to achieve a high withstand voltage. This is also required if the thickness of the insulator layer in the region of the gate electrode increases in steps or continuously in the direction of the drain zone. The drain zone may also be located higher or lower than the source zone with respect to the semiconductor surface.
If a highly doped zone of the first conductivity type is used for the conductive connection, then this zone can be produced in a similar way to that for insulation diffusion or that for integrated circuits insulated by means of a pn junction. The conductive connection may, however, also be produced via a trench, out which of dopant of the first conductivity type is diffused, and which is then filled with polycrystalline or monocrystalline silicon or with an insulator, such as silicon dioxide.
The drain connections and the source zones may be arranged in the form of strips or like cells. In the case of a gate electrode provided in the semiconductor layer, this electrode is planted in a trench which surrounds the drain zone. The source zone is arranged outside the trench and is electrically connected to the semiconductor substrate by means of the conductive connection, which preferably comprises a deep trench with a conductive wall composed, for example, of titanium nitride.
The conductive connections may be arranged as required; for example, they may be provided in the form of cells between drain zones in the form of strips, or may themselves be in the form of strips.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a power MOSFET, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes
Greenberg Laurence A.
Infineon - Technologies AG
Lee Eddie
Lee Eugene
Mayback Gregory L.
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