Power mode transition in multi-threshold complementary metal...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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C326S038000, C716S030000

Reexamination Certificate

active

07613942

ABSTRACT:
In one embodiment, a method for power mode transition in a multi-threshold complementary metal oxide semiconductor (MTCMOS) circuit includes clustering logic cells in the circuit to a number of logic clusters and optimizing wake-up times of the logic clusters to reduce a total turn-on time of the circuit while keeping below a predetermined threshold a sum of currents flowing from the circuit to ground, a sum of currents flowing from a supply voltage to the circuit, or both during a transition by the circuit from sleep mode to active mode.

REFERENCES:
A. Davoodi and A. Srivastava, “Wake-up Protocols for Controlling Current Surges in MTCMOS-based Technology,” in Proceedings of Asia South Pacific Design Automation Conference, Jan. 2005.
Kao et al., “Transistor Sizing Issues and Tool for Multi-Threshold CMOS Technology,” Design Automation Conference, pp. 409-414, 1997.
Kao et al., “MTCMOS Hierarchical Sizing Based on Mutual Exlusive Discharge Patterns,” Design Automation Conference, 6 pages, 1998.
Anis et al., “Dynamic and Leakage Power Reduction in MTCMOS Circuits Using an Automated Efficient Gate Clustering Technique,” Design Automation Conference, 6 pages, 2002.
Kim et al., “Experimental Measurement of a Novel Power Gating Structure with Intermediate Power Save Mode,” International Symposium on Low Power Electronics and Design, pp. 20-25, 2004.
Kim et al., “Understanding and Minimizing Ground Bounce During Mode Transition of Power Gating Structures,” International Symposium on Low Power Electronics and Design, pp. 22-25, Aug. 25-27, 2003.
Won, Hyo-Sig et al., “An MTCMOS Design Methodology and Its Application to Mobile Computing,” International Symposium on Low Power Electronics and Design, pp. 110-115, Aug. 25-27, 2003.
Usami et al., “Automated Selective Multi-Threshold Design for Ultra-Low Standby Applications,” International Symposium on Low Power Electronics and Design, pp. 202-206, Aug. 12-14, 2002.
Johnson et al., “Leakage Control with Efficient Use of Transistor Stacks in Single Threshold CMOS,” Design Automation Conference, 4 pages, 1999.
Cormen et al., “Introduction to Algorithms,” 2nd ed. Cambridge, Massachussetts: MIT Press, 2001.

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