Power management using processor throttling emulation

Details Power management using processor throttling emulation Power management using processor throttling emulation

2006-07-25

2006-07-25

Browne, Lynne H. (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S322000, C713S323000

Reexamination Certificate

active

07082542

ABSTRACT:
In one embodiment of the invention, a processor state of a processor is determined upon expiration of a system management interrupt (SMI) timer. The processor state is one of an operational state and a low power state. The SMI timer is loaded with a timer value based on the processor state. The timer value is one of a first value and a second value. The processor is transitioned to one of the operational state and the low power state according to the processor state.

REFERENCES:
patent: 5983357 (1999-11-01), Sun
patent: 6016548 (2000-01-01), Nakamura et al.

Affiliated with

Also associated with

Rating

Power management using processor throttling emulation does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Power management using processor throttling emulation, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Power management using processor throttling emulation will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3602578