Patent
1996-01-11
1997-04-08
Auve, Glenn A.
395750, 395735, G06F 1300
Patent
active
056197292
ABSTRACT:
A device and method for power management of direct memory access ("DMA") slaves through DMA traps. The device comprises a plurality of registers coupled with conventional logic in order to generate a control signal for disabling direct memory access transfer requests for a powered-off DMA slave until the slave is re-powered. The method for managing power comprises steps of unmasking bits in a register containing information regarding which DMA slaves have been powered-off. Next, the DMA Controller consults a power management macro ("PMM") to determine whether a DMA transfer request involves a powered-off DMA slave. If not, the DMA transfer continues. However, if the DMA transfer does involve a powered-off DMA slave, then a main software application in operation is temporarily halted and the PMM generates a SMI signal and outputs the SMI signal to the central processing unit ("CPU") while keeping the disable control signal asserted, which effectively disables the DMA channel. The SMI signal invokes a software service routine which re-powers the powered-off DMA slave so that the main software application can continue.
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Amini Nader
Bland Patrick M.
Boury Bechara F.
Hofmann Richard G.
Jackson Robert T.
Auve Glenn A.
Intel Corporation
International Business Machines - Corporation
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