Power management method for setting clock circuit into power...

Details Power management method for setting clock circuit into power... Power management method for setting clock circuit into power...

2006-02-21

2006-02-21

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S322000

Reexamination Certificate

active

07003682

ABSTRACT:
In an electronic device, a first electronic circuit is selectively operated in a selected one of at least two operating modes. A second electronic circuit is selectively operated in a power-up mode and a power-down mode. The second electronic circuit is put into the power-down mode if the first electronic circuit is operated in one of the at least two operating modes.

REFERENCES:
patent: 4980836 (1990-12-01), Carter et al.
patent: 5625311 (1997-04-01), Nakatsu
patent: 5838983 (1998-11-01), Atkinson
patent: 6412075 (2002-06-01), Klein
patent: 6711631 (2004-03-01), Chan et al.

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