Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2002-03-29
2003-03-25
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S208000
Reexamination Certificate
active
06538314
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of semiconductor devices; more specifically, it relates a power grid for supplying power to an integrated circuit chip having a voltage island.
2. Background of the Invention
In an effort to increase performance, lower power consumption and integrate several integrated circuit technologies on the same chip, the concept of voltage islands has been introduced into integrated circuit design.
The voltage island concept allows for one or more portions of an integrated circuit chip to be powered by both a global (chip wide) power source (VDDG) and a local or voltage island power source (VDDI). VDDG and VDDI can be switched on and off by the user as the operation of the integrated circuit demands.
Because voltage islands require both global and local power sources space must be allocated in the voltage island to accommodate wiring grids for both power sources. Wiring grids are placed in the upper wiring levels, usually in the last wiring level of integrated circuit chips. Often, especially for peripheral pad chips, for example wirebond chips, there is either not enough room for both sets of grids or for both sets of grids and additional wiring, for example, I/O signals.
The conventional solution to this problem is to increase the area of the voltage island, and consequently, increase the size of the chip, to provide sufficient wiring space. This leads to waste of silicon space and increased costs as well as reduced performance because of longer wire lengths.
An alternative that does not require increasing the size of the chip to include voltage island power grids and I/O signal wiring is required to avoid unnecessary costs and degraded device performance.
BRIEF SUMMARY OF THE INVENTION
A first aspect of the present invention is a semiconductor device comprising: a global power bus having a first portion for supplying power to a first set of circuits and a second portion for supplying power to a second set of circuits; a local power bus for supplying alternative power to the second set of circuits; and wherein the total of the width of the second portion of the global power bus and of the width of the local power bus does not exceed the width of the first portion of the global power bus.
A second aspect of the present invention is an integrated circuit chip comprising: a first set of circuits contained within a device region of the integrated circuit chip; a second set of circuits contained within a voltage island, the voltage island contained within the device region; a global power bus having a first portion outside of the voltage island for supplying power to the first set of circuits and a second portion within the voltage island for supplying power to the second set of circuits; a local power bus within the voltage island for supplying alternative power to the second set of circuits; and wherein the total of the width of the second portion of the global power bus and of the width of the local power bus does not exceed the width of the first portion of the global power bus.
A third aspect of the present invention is a method of supplying power to an integrated circuit chip comprising: providing a global power bus having a first portion for supplying power to a first set of circuits and a second portion for supplying power to a second set of circuits; providing a local power bus for supplying alternative power to the second set of circuits; and wherein the total of the width of the second portion of the global power bus and of the width of the local power bus does not exceed the width of the first portion of the global power bus.
REFERENCES:
patent: 5119168 (1992-06-01), Misawa
patent: 6445065 (2002-09-01), Gheewala et al.
patent: 2001/0054760 (2001-12-01), Ito et al.
Buffet Patrick H.
Sun Yu H.
Henkler Richard A.
Ho Tu-Tu
International Business Machines - Corporation
Schmeiser Olsen & Watts
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