Power gating logic cones

Details Power gating logic cones Power gating logic cones

2011-01-18

2011-01-18

Rossoshek, Helen (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C703S013000, C703S014000

Reexamination Certificate

active

07873923

ABSTRACT:
Power gating logic cones is described. In one embodiment a method includes synthesizing logic for an integrated circuit (IC) design; identifying low switching nodes within the logic that switch less than a threshold; determining a potential power gating cone (PGC) based on the identified low switching nodes; determining a power gating logic expression for the potential PGC that includes a minimum set of inputs to the potential PGC that are least switching; determining whether energy savings using the power gating logic expression meets a criteria; and accepting the potential PGC in response to meeting the criteria.

REFERENCES:
patent: 5880604 (1999-03-01), Kawahara et al.
patent: 6345379 (2002-02-01), Khouja et al.
patent: 6687883 (2004-02-01), Cohn et al.
patent: 6977519 (2005-12-01), Bhavnagarwala et al.
patent: 7088131 (2006-08-01), Stout et al.
patent: 7100144 (2006-08-01), Jacobson et al.
patent: 7603635 (2009-10-01), Sotiriou et al.
patent: 2004/0060016 (2004-03-01), Patra et al.
patent: 2006/0236278 (2006-10-01), Shimony
patent: 2009/0100385 (2009-04-01), Baumgartner et al.
Kim et al.; “Logic transformation for low power synthesis”; Publication Year: 1999; Design, Automation and Test in Europe Conference and Exhibition 1999. Proceedings, pp. 158-162.
Sagahyroon et al.; “A VHDL-based simulation methodology for estimating switching activity in static CMOS circuits”; Publication Year: 1998 ; ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International; pp. 295-300.
Sundaram et al.; “Logic simulation using T-algorithm on network of workstations”; Publication Year: 1994; TENCON '94. IEEE Region 10's Ninth Annual International Conference. Theme: Frontiers of Computer Technology; pp. 285-289 vol. 1.
Czajkowski et al.; “Fast toggle rate computation for FPGA circuits”; Publication Year: 2008; Field Programmable Logic and Applications, 2008. FPL 2008. International Conference on; pp. 65-70.
Chen et al.; “State encoding of finite state machines for low power design”; Publication Year: 1995; Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on ; vol. 3; pp. 2309-2312 vol. 3.

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