Power failure safe computer architecture

Details Power failure safe computer architecture Power failure safe computer architecture

1998-09-11

2000-11-28

Ray, Gopal C.

Electrical computers and digital processing systems: support

Computer power control

714 22, G06F 126, G06F 130

Patent

active

061548456

ABSTRACT:
A component powered by a first power supply activates a driving signal. The driving signal indicates that both a second power supply voltage has a magnitude greater than a reference voltage and an enable signal is active. A driver transfers the output signal when the driving signal is active. In a multi-processor computer system implementation, each of two processor cores are independently supplied power by each of two core power supplies while a single I/O power supply supplies power to the I/O rings of both processors. Each processor includes a bus isolation circuit to prevent its respective processor from loading the system bus in the event that a core power supply fails.

REFERENCES:
patent: 4228496 (1980-10-01), Katzman et al.
patent: 4581551 (1986-04-01), Campbell, Jr.
patent: 4586179 (1986-04-01), Sirazi et al.
patent: 4639864 (1987-01-01), Katzman et al.
patent: 5036455 (1991-07-01), Atwood
patent: 5317752 (1994-05-01), Jewett et al.
patent: 5933025 (1999-08-01), Nance et al.
PCT Search Report for International application No. PCT/US99/20550, mailed Dec. 23, 1999.

Affiliated with

Also associated with

Rating

Power failure safe computer architecture does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Power failure safe computer architecture, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Power failure safe computer architecture will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1736046