Power factor correction circuit and circuit therefor having sens

Details Power factor correction circuit and circuit therefor having sens Power factor correction circuit and circuit therefor having sens

1996-12-26

1998-05-26

Hecker, Stuart N.

Electric power conversion systems

Current conversion

With condition responsive means to control the output...

363 80, 323222, H02M 324, H02M 542, G05F 110

Patent

active

057576351

ABSTRACT:
A power factor correction circuit includes a boost converter, a zero-current detector for detecting a period in which an inductor current is zero, a half-wave rectifier for supplying a power voltage proportional to an output voltage of the boost converter, a control voltage generator for generating a control voltage to control the turn-on time timing of a sense-FET, a turn-on controller for making constant a turn-on duration of the sense-FET, an over current detector for generating a signal when a mirror terminal current of the sense-FET is greater than a predetermined current, an OR gate for performing a logic OR operation of the output signals of the turn-on controller and the over current detector, an output current controller for generating a gate drive signal of the sense-FET, and an under voltage lock out for turning off the power voltage when the power voltage is less than a predetermined voltage. This circuit enables an external pin count to be reduced by having a built-in boost converter controller and a built-in sense-FET in a single package.

REFERENCES:
patent: 4677366 (1987-06-01), Wilkinson et al.
patent: 4683529 (1987-07-01), Bucher, II
patent: 5001620 (1991-03-01), Smith
patent: 5006975 (1991-04-01), Neufeld
patent: 5134355 (1992-07-01), Hastings
patent: 5612609 (1997-03-01), Choi
patent: 5617405 (1997-04-01), Kammiller et al.

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