Power-efficient technique for invoking a co-processor

Electrical computers and digital processing systems: support – Computer power control

Reexamination Certificate

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C713S320000, C713S323000

Reexamination Certificate

active

07496770

ABSTRACT:
Various embodiments are disclosed relating to power-efficient techniques for invoking a co-processor. In an example embodiment, a computer system may include a first processor (e.g., a host processor) and a second processor (e.g., a co-processor). The first processor may instruct the second processor to perform an operation repeatedly on a data stream. The first processor may be placed in a low power state. The second processor may perform the operation repeatedly on the data stream while the first processor remains in the low-power state.

REFERENCES:
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patent: 6279048 (2001-08-01), Fadavi-Ardekani et al.
patent: 6373904 (2002-04-01), Sakamoto et al.
patent: 7184003 (2007-02-01), Cupps et al.
patent: 7213162 (2007-05-01), Oshima et al.
patent: 2002/0087225 (2002-07-01), Howard

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