Power device having multi-chip package structure

Details Power device having multi-chip package structure Power device having multi-chip package structure

2003-01-08

2004-06-29

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Die bond

C257S686000, C257S723000, C257S724000, C257S725000

Reexamination Certificate

active

06756689

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a power device, and more particularly, to a multi-chip package in which a transistor, which is a switching device, and a control-integrated circuit (IC) which is a driving device, are mounted together in a package, thereby requiring a high insulation withstand voltage between the switching device and the control IC, and to a manufacturing method therefor.
2. Description of the Related Art
In power devices, a smart power switching (SPS) product contains a control IC, which is a driving device, and a transistor, which is a switching device. In a packaging process for SPS power devices, two chips are mounted together on one chip pad. However, in this case, an insulation means between the two chips, i.e., a control IC chip and a transistor chip, comes to the front as an important problem. During a packaging process, a common method of insulating the SPS power device is to attach one chip by inserting a ceramic plate or epoxy mold compound plate between die adhesives or to use a liquid non-conductive adhesive.
FIGS. 1 through 3
are cross-sectional views for explaining a conventional insulation method between two chips when the two chips are mounted on a chip pad.
FIG. 1
is a cross-sectional view of a power device in which a ceramic plate is inserted between die adhesives for one chip. Specifically, a transistor chip
11
, which is a switching device, is attached on a chip pad
10
by a conductive adhesive
12
. In addition, a control IC chip
16
is attached by inserting a ceramic plate
15
between die adhesives
13
and
14
to provide insulation from the chip pad
10
. Reference numeral
17
in
FIG. 1
denotes a mold line coated with an epoxy mold compound that is used as a molding means. However, the above process has some problems in that a ceramic plate is breakable and expensive, so the manufacturing cost increases, and the overall packaging process becomes more complicated since a process of inserting a ceramic plate must be additionally performed therein.
FIG. 2
is a cross-sectional view of a power device in which an EMC plate is inserted between die adhesives for one chip. Specifically, a transistor chip
21
, which is a switching device, is attached on a chip pad
20
by a conductive adhesive
22
. A control IC chip
26
is attached with the EMC plate
25
inserted between die adhesives
23
and
24
to provide insulation from the chip pad
20
. Reference numeral
27
in
FIG. 2
denotes a mold line coated with an EMC which is a molding means. In this case, the EMC plate is cheaper than a ceramic plate, but there still remains problems in that a process becomes complicated.
FIG. 3
is a cross-sectional view of a power device in which a liquid non-conductive adhesive is used as a die adhesive. Specifically, a transistor chip
31
is attached on a chip pad
30
by a conductive adhesive
32
. A control IC chip
36
is attached by a liquid non-conductive adhesive
35
to provide insulation from the chip pad
30
. Reference numeral
37
in
FIG. 3
denotes a mold line coated with an EMC which is used as a molding means. However, when using the liquid non-conductive adhesive
35
, some problems occur. The overall thickness of a liquid non-conductive adhesive is not completely uniform so that a chip tends to be slanted.
Furthermore, in the course of hardening a liquid non-conductive adhesive after the control IC chip
36
is attached, a void occurs in the liquid conductive adhesive, so that it is difficult to ensure the stable reliability of the products. In addition, the control IC chip
36
and the non-conductive adhesive
35
are not completely attached together so that there is a crevice at the adhesion boundary, which is called delamination. This degrades product reliability.
In addition to the above method, there is a packaging method wherein the two chips are vertically attached to each other. This method has been disclosed in U.S. Pat. No. 5,777,345 titled “Multi-chip Integrated Circuit Package” (Patent date: Jul., 7, 1998), U.S. Pat. No. 4,697,095 titled “Chip-on-Chip Semiconductor Device Having Selectable Terminal” (Patent date: Sep. 29, 1987), and U.S. Pat. No. 4,703,483 titled “Chip-on-Chip Type Integrated Circuit Device” (Patent date: Oct. 27, 1987).
SUMMARY OF THE INVENTION
To solve the above problems, it is a first object of the present invention to provide a power device having a multi-chip package structure which is capable of ensuring sufficient insulation between two chips mounted on a chip pad, simplifying a process, and miniaturizing the overall size of a package.
It is a second object of the invention to provide a manufacturing method for a power device having the multi-chip package structure.
To achieve the first object, the present invention provides a power device having a multi-chip package structure in which a transistor, which is a switching device, and a control IC chip, which is a driving device, are mounted together in a package through a first embodiment. The power device includes a lead frame having a chip pad, an inner lead and an outer lead, a transistor chip, which is a switching device, attached on the chip pad of the lead frame by a conductive adhesive, a control integrated circuit (IC) chip, which is a driving device, attached on the chip pad of the lead frame at the side of the transistor chip by an insulating adhesive tape, a first gold wire for connecting a bond pad of the transistor chip and a bond pad of the control integrated circuit chip, a second gold wire for connecting a bond pad of the transistor chip and a bond pad of the control integrated circuit chip with the inner lead of the lead frame, respectively, and a molding means for molding the chip pad of the lead frame, inner lead, control integrated circuit chip, and first and second gold wires. Preferably, the conductive adhesive is solder, and an insulation withstand voltage required by the transistor chip is in the range of 500-1,000 V.
The insulating adhesive tape is attached at a temperature that is lower than the melting point of the conductive adhesive It has a single layered structure composed of polyimide base thermosetting resin or polyimide base thermoplastic resin or a multi-layered structure such as a triple layered structure comprised of a first adhesive layer, an insulating layer, and a second adhesive layer. In this case, the first and second adhesive layers are preferably polyimide base thermosetting resin or polyimide thermoplastic resin. The thickness of the insulating layer is preferably dependent on the insulation withstand voltage of the transistor chip.
To achieve the first object, the present invention also provides a power device having a multi-chip package in which a transistor, which is a switching device, and a control integrated circuit, which is a driving device, are mounted together in a package, through second and third embodiments. The power device includes a lead frame including a chip pad, an inner lead and an outer lead, a transistor chip, which is a switching device, attached on the chip pad of the lead frame by a conductive adhesive, an insulating adhesive means which overlies the central portion of the transistor chip surface excluding a predetermined region around the perimeter of the transistor chip surface, a control integrated circuit (IC) chip, which is a driving device, attached on the insulating adhesive means, a first gold wire for connecting a bond pad of the transistor chip to a bond pad of the control integrated circuit chip, a second gold wire for connecting a bond pad of the transistor chip and a bond pad of the control integrated circuit chip to the inner lead of the lead frame to one another, respectively, and a molding means for molding the chip pad of the lead frame, inner lead, transistor chip, control integrated circuit chip, and first and second gold wires.
Preferably, the conductive adhesive is solder, and an insulation withstand voltage required by the transistor chip is in the range of 500-1,000 V. Preferably, the insulating a

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