Power detecting circuit and method for stable power-on...

Details Power detecting circuit and method for stable power-on... Power detecting circuit and method for stable power-on...

2005-04-19

2005-04-19

Hoang, Huan (Department: 2818)

Static information storage and retrieval

Floating gate

Particular biasing

C365S189070, C365S226000

Reexamination Certificate

active

06882570

ABSTRACT:
Embodiments of the invention provide a power-on reset function that establishes logic circuits in a memory chip at an initial stable state and a power-on read function that triggers a read operation of the memory chip. A first voltage detector output signal transitions when a power supply voltage reaches a first voltage, setting the logic circuits at the initial stable state. A second voltage detector output signal transitions when the power supply voltage reaches a second voltage, placing a latch in a set state that results in activation of a power-on read signal. A power-on read operation is carried out according to the activation of the power-on read signal. If the power supply voltage is not lowered below the first voltage, the second voltage detector output signal does not transition. Accordingly, embodiments are capable of preventing power-on read operations that are unnecessarily performed owing to power noise.

REFERENCES:
patent: 6101127 (2000-08-01), Rolandi
patent: 6108246 (2000-08-01), Umezawa et al.
patent: 6204703 (2001-03-01), Kwon
patent: 2000-35580 (2000-06-01), None
English language of Abstract for Korean Patent Publication No. 2000-35580.

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