Power consumption analyzing apparatus and power consumption...

Data processing: measuring – calibrating – or testing – Measurement system in a specific environment – Electrical signal parameter measurement system

Reexamination Certificate

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C716S030000, C714S022000, C713S300000, C713S320000, C702S081000, C702S182000, C702S189000, C326S038000, C326S040000, C326S041000, C324S073100

Reexamination Certificate

active

07908100

ABSTRACT:
A power consumption analyzing apparatus has a clock gating cell detector configured to detect a clock gating cell which is not present in RTL data but present in a gate-level netlist, a test bench description generation unit configured to add a description concerning the clock gating cell, a monitor signal generation unit configured to specify a monitor signal used for power consumption analysis from the RTL data, an RTL simulation unit configured to execute operational simulation of the target circuit, a monitor unit configured to detect a logic of the monitor signal during the execution of the operational simulation, and a power consumption analysis unit configured to analyze power consumption.

REFERENCES:
patent: 6552572 (2003-04-01), Cheung et al.
patent: 2006-190149 (2006-07-01), None
patent: 2008-134824 (2008-06-01), None
Donno et al., ‘Clock-Tree Power Optimization based on RTL Clock-Gating’, 2003, DAC Publicaiton, pp. 622-627.
Japanese Office Action mailed Nov. 5, 2010 for Japanese Patent Application No. 2007-162510.

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