Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-01-11
2011-01-11
Thomas, Shane M (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S154000, C711SE12041, C702S060000, C702S064000
Reexamination Certificate
active
07870337
ABSTRACT:
A snoop coherency method, system and program are provided for intervening a requested cache line from a plurality of candidate memory sources in a multiprocessor system on the basis of the sensed temperature or power dissipation value at each memory source. By providing temperature or power dissipation sensors in each of the candidate memory sources (e.g., at cores, cache memories, memory controller, etc.) that share a requested cache line, control logic may be used to determine which memory source should source the cache line by using the power sensor signals to signal only the memory source with acceptable power dissipation to provide the cache line to the requester.
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Bell, Jr. Robert H.
Capps, Jr. Louis B.
Cook Thomas E.
Nayar Naresh
Shapiro Michael J.
Cannatti Michael Rocco
Dudek, Jr. Edward J
Hamilton & Terrile LLP
International Business Machines - Corporation
Thomas Shane M
LandOfFree
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